omit unused code.
This commit is contained in:
Gatsby Van
+123
-125
@@ -39,10 +39,6 @@
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#include "networking/phy_layer/phy_layer.h"
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#include "networking/link_layer/link_layer.h"
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/* D0-D7 D16-D31 was save and restored (standalone asm_vectors.S:83) */
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#define save_extra_fpu_context() __asm("VPUSH {d7-d15}")
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#define restore_extra_fpu_context() __asm("VPOP {d7-d15}")
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/************************** Function Prototypes ******************************/
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int32_t SetupInterruptSystem(struct irq_ctrl_desc* descPtr);
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void Phy_IntrHandler(void *context);
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@@ -53,18 +49,22 @@ struct callback_desc phy_callback_desc = {
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.callback = Phy_IntrHandler,
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.ctx = NULL
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};
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struct callback_desc sysbus_rx_callback_desc = {
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.callback = Systembus_RxIntrHandler,
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.ctx = NULL
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};
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struct callback_desc sysbus_tx_callback_desc = {
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.callback = Systembus_RxIntrHandler,
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.ctx = NULL
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};
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struct callback_desc scutm_callback_desc = {
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.callback = ScuTimer_IntrHandler,
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.ctx = NULL
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};
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static PHY_CONFIG phyConfig = {
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.devId = 0,
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.baseAddr = PHY_BASEADDR,
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@@ -215,8 +215,6 @@ int32_t SetupInterruptSystem(struct irq_ctrl_desc* descPtr) {
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return SUCCESS;
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} // SetupInterruptSystem
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/****************************************************************************/
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/**
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* This function is a interrupt service routine for IRQ_F2P[1:1], IRQ_F2P[1:1]
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@@ -310,139 +308,139 @@ int Hardware_SwitchFreq(struct ad9361_reg_dev *dev, ad9361TxFreq freq){
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switch(freq){
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case TX_FREQ_125: {
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x94); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x94); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Write Tx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x00); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0x00); // Write Tx Synth Fractional Freq Word[15:8]
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status = ad9361_reg_write(dev, 0x0275, 0x00); // Write Tx Synth Fractional Freq Word[22:16]
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status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
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status = ad9361_reg_write(dev, 0x0271, 0xA0); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
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status = ad9361_reg_write(dev, 0x0005, 0x57); // Set LO divider setting
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//************************************************************
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// Write Tx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x00); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0x00); // Write Tx Synth Fractional Freq Word[15:8]
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status = ad9361_reg_write(dev, 0x0275, 0x00); // Write Tx Synth Fractional Freq Word[22:16]
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status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
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status = ad9361_reg_write(dev, 0x0271, 0xA0); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
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status = ad9361_reg_write(dev, 0x0005, 0x57); // Set LO divider setting
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//************************************************************
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// Tx Quadrature Calibration Settings
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//************************************************************
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status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
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status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
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status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
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status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
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status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
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status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00AA, 0x22); // Set Tx Quad Cal Gain Table index
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status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
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status = ad9361_reg_write(dev, 0x00AE, 0x00); // Set Tx Quad Cal LPF Gain index incase Split table mode used
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//************************************************************
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// Tx Quadrature Calibration Settings
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//************************************************************
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status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
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status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
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status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
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status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
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status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
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status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00AA, 0x22); // Set Tx Quad Cal Gain Table index
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status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
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status = ad9361_reg_write(dev, 0x00AE, 0x00); // Set Tx Quad Cal LPF Gain index incase Split table mode used
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status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
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status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
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status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
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status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
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break;
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break;
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}
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case TX_FREQ_126: {
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x93); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x93); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Write Tx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x06); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0xD7); // Write Tx Synth Fractional Freq Word[15:8]
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status = ad9361_reg_write(dev, 0x0275, 0x23); // Write Tx Synth Fractional Freq Word[22:16]
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status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
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status = ad9361_reg_write(dev, 0x0271, 0xA1); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
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status = ad9361_reg_write(dev, 0x0005, 0x57); // Set LO divider setting
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//************************************************************
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// Write Tx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x06); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0xD7); // Write Tx Synth Fractional Freq Word[15:8]
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status = ad9361_reg_write(dev, 0x0275, 0x23); // Write Tx Synth Fractional Freq Word[22:16]
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status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
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status = ad9361_reg_write(dev, 0x0271, 0xA1); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
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status = ad9361_reg_write(dev, 0x0005, 0x57); // Set LO divider setting
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//************************************************************
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// Tx Quadrature Calibration Settings
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//************************************************************
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status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
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status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
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status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
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status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
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status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
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status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00AA, 0x22); // Set Tx Quad Cal Gain Table index
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status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
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status = ad9361_reg_write(dev, 0x00AE, 0x00); // Set Tx Quad Cal LPF Gain index incase Split table mode used
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//************************************************************
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// Tx Quadrature Calibration Settings
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//************************************************************
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status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
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status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
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status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
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status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
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status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
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status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
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status = ad9361_reg_write(dev, 0x00AA, 0x22); // Set Tx Quad Cal Gain Table index
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status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
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status = ad9361_reg_write(dev, 0x00AE, 0x00); // Set Tx Quad Cal LPF Gain index incase Split table mode used
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status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
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status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
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status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
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status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
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break;
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break;
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}
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case TX_FREQ_4125: {
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x93); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Setup Tx Frequency-Dependent Syntheisizer Registers
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//************************************************************
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status = ad9361_reg_write(dev, 0x027A, 0x4A); // Set VCO Output level[3:0]
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status = ad9361_reg_write(dev, 0x0279, 0xC1); // Set Init ALC Value[3:0] and VCO Varactor[3:0]
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status = ad9361_reg_write(dev, 0x0282, 0x0E); // Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
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status = ad9361_reg_write(dev, 0x0278, 0x78); // Set VCO Cal Offset[3:0]
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status = ad9361_reg_write(dev, 0x0285, 0x00); // Set VCO Cal Ref Tcf[2:0]
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status = ad9361_reg_write(dev, 0x0291, 0x0B); // Set VCO Varactor Reference[3:0]
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status = ad9361_reg_write(dev, 0x0290, 0x70); // Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
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status = ad9361_reg_write(dev, 0x027B, 0x93); // Set Synth Loop Filter charge pump current (Icp)
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status = ad9361_reg_write(dev, 0x027E, 0xF4); // Set Synth Loop Filter C2 and C1
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status = ad9361_reg_write(dev, 0x027F, 0xDF); // Set Synth Loop Filter R1 and C3
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status = ad9361_reg_write(dev, 0x0280, 0x0A); // Set Synth Loop Filter R3
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//************************************************************
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// Write Rx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x00); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0x00); // Write Tx Synth Fractional Freq Word[15:8]
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status = ad9361_reg_write(dev, 0x0275, 0x00); // Write Tx Synth Fractional Freq Word[22:16]
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status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
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status = ad9361_reg_write(dev, 0x0271, 0xA5); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
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status = ad9361_reg_write(dev, 0x0005, 0x07); // Set LO divider setting
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//************************************************************
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// Write Rx Frequency Words
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//************************************************************
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status = ad9361_reg_write(dev, 0x0273, 0x00); // Write Tx Synth Fractional Freq Word[7:0]
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status = ad9361_reg_write(dev, 0x0274, 0x00); // Write Tx Synth Fractional Freq Word[15:8]
|
||||
status = ad9361_reg_write(dev, 0x0275, 0x00); // Write Tx Synth Fractional Freq Word[22:16]
|
||||
status = ad9361_reg_write(dev, 0x0272, 0x00); // Write Tx Synth Integer Freq Word[10:8]
|
||||
status = ad9361_reg_write(dev, 0x0271, 0xA5); // Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
|
||||
status = ad9361_reg_write(dev, 0x0005, 0x07); // Set LO divider setting
|
||||
|
||||
//************************************************************
|
||||
// Tx Quadrature Calibration Settings
|
||||
//************************************************************
|
||||
status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
|
||||
status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
|
||||
status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
|
||||
status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
|
||||
status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
|
||||
status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
|
||||
status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
|
||||
status = ad9361_reg_write(dev, 0x00AA, 0x28); // Set Tx Quad Cal Gain Table index
|
||||
status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
|
||||
status = ad9361_reg_write(dev, 0x00AE, 0x04); // Set Tx Quad Cal LPF Gain index incase Split table mode used
|
||||
//************************************************************
|
||||
// Tx Quadrature Calibration Settings
|
||||
//************************************************************
|
||||
status = ad9361_reg_write(dev, 0x00A0, 0x75); // Set TxQuadcal NCO frequency
|
||||
status = ad9361_reg_write(dev, 0x00A3, 0xC0); // Set TxQuadcal NCO frequency (Only update bits [7:6])
|
||||
status = ad9361_reg_write(dev, 0x00A1, 0x7B); // Tx Quad Cal Configuration, Phase and Gain Cal Enable
|
||||
status = ad9361_reg_write(dev, 0x00A9, 0xFF); // Set Tx Quad Cal Count
|
||||
status = ad9361_reg_write(dev, 0x00A2, 0x7F); // Set Tx Quad Cal Kexp
|
||||
status = ad9361_reg_write(dev, 0x00A5, 0x01); // Set Tx Quad Cal Magnitude Threshhold
|
||||
status = ad9361_reg_write(dev, 0x00A6, 0x01); // Set Tx Quad Cal Magnitude Threshhold
|
||||
status = ad9361_reg_write(dev, 0x00AA, 0x28); // Set Tx Quad Cal Gain Table index
|
||||
status = ad9361_reg_write(dev, 0x00A4, 0xF0); // Set Tx Quad Cal Settle Count
|
||||
status = ad9361_reg_write(dev, 0x00AE, 0x04); // Set Tx Quad Cal LPF Gain index incase Split table mode used
|
||||
|
||||
status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
|
||||
status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
|
||||
status = ad9361_reg_write(dev, 0x0169, 0xC0); // Disable Rx Quadrature Calibration before Running Tx Quadrature Calibration
|
||||
status = ad9361_reg_write(dev, 0x0016, 0x10); // Start Tx Quad cal
|
||||
|
||||
break;
|
||||
break;
|
||||
}
|
||||
|
||||
// Wait for cal to complete (Done when 0x016[4]==0)
|
||||
@@ -472,9 +470,9 @@ int Hardware_Init(void) {
|
||||
XGpioPs_Config *ConfigPtr;
|
||||
ConfigPtr = XGpioPs_LookupConfig(AD9361_GPIO_DEVICE_ID);
|
||||
Status = XGpioPs_CfgInitialize(&Gpio, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
if (Status != XST_SUCCESS)
|
||||
if (Status != SUCCESS)
|
||||
{
|
||||
return XST_FAILURE;
|
||||
return FAILURE;
|
||||
}
|
||||
|
||||
/**********************************************************/
|
||||
|
||||
Reference in New Issue
Block a user