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fix: adjust hop logic; adjust hop freq generation

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This commit is contained in:
Josh Gao
2024-11-08 16:11:35 +08:00
parent 775590f3f7
commit 0d6beb1ed5
8 changed files with 123 additions and 111 deletions
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rfsoc_eval_nco/rfsoc_eval_nco.runs/impl_1/system_top.bit
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rfsoc_eval_nco/rfsoc_eval_nco.srcs/sources_1/ip/ila_hop/ila_hop.xci
+5 -5
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@@ -2039,7 +2039,7 @@
"C_PROBE17_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE17_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE16_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE16_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE15_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE15_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE14_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE14_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE13_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE13_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE12_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE12_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE11_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE11_WIDTH": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
@@ -2054,7 +2054,7 @@
"C_PROBE2_WIDTH": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE2_WIDTH": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE1_WIDTH": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE1_WIDTH": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE0_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE0_WIDTH": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_DATA_DEPTH": [ { "value": "16384", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_DATA_DEPTH": [ { "value": "32768", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_NUM_OF_PROBES": [ { "value": "14", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_NUM_OF_PROBES": [ { "value": "14", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_XLNX_HW_PROBE_INFO": [ { "value": "DEFAULT", "resolve_type": "user", "usage": "all" } ], "C_XLNX_HW_PROBE_INFO": [ { "value": "DEFAULT", "resolve_type": "user", "usage": "all" } ],
"Component_Name": [ { "value": "ila_hop", "resolve_type": "user", "usage": "all" } ], "Component_Name": [ { "value": "ila_hop", "resolve_type": "user", "usage": "all" } ],
@@ -3082,7 +3082,7 @@
"C_PROBE17_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE17_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE16_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE16_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE15_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE15_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE14_MU_CNT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE14_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE13_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE13_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE12_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE12_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ],
"C_PROBE11_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ], "C_PROBE11_MU_CNT": [ { "value": "2", "resolve_type": "user", "format": "long", "usage": "all" } ],
@@ -3135,7 +3135,7 @@
"C_NUM_MONITOR_SLOTS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_NUM_MONITOR_SLOTS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_ILA_AXI_MON": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_ENABLE_ILA_AXI_MON": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_NUM_OF_PROBES": [ { "value": "14", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_NUM_OF_PROBES": [ { "value": "14", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DATA_DEPTH": [ { "value": "16384", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_DATA_DEPTH": [ { "value": "32768", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MAJOR_VERSION": [ { "value": "2024", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_MAJOR_VERSION": [ { "value": "2024", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MINOR_VERSION": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ], "C_MINOR_VERSION": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_BUILD_REVISION": [ { "value": "0", "format": "long", "usage": "all" } ], "C_BUILD_REVISION": [ { "value": "0", "format": "long", "usage": "all" } ],
@@ -5220,7 +5220,7 @@
"C_PROBE11_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE11_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE12_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE12_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE13_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE13_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE14_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE14_MU_CNT": [ { "value": "2", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE15_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE15_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE16_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE16_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
"C_PROBE17_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ], "C_PROBE17_MU_CNT": [ { "value": "1", "resolve_type": "dependent", "format": "long", "usage": "all" } ],
rfsoc_eval_nco/rfsoc_eval_nco.srcs/sources_1/new/system_top.v
+8 -3
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@@ -862,7 +862,7 @@ always @(posedge ps_clk_100m) begin
// increase addr when hopping is enabled, otherwise get hop freq number // increase addr when hopping is enabled, otherwise get hop freq number
if (vio_hop_en) begin if (vio_hop_en) begin
if (hop_cnt == 'b0) begin if (hop_cnt == 'b0) begin
hop_ram_addr <= (hop_ram_addr < hop_freq_num) ? hop_ram_addr + 1'b1 : 1'b1; hop_ram_addr <= (hop_ram_addr < (hop_freq_num << 3)) ? hop_ram_addr + 48'd8 : 48'd8;
end end
end end
else begin else begin
@@ -879,13 +879,18 @@ always @(posedge ps_clk_100m) begin
// get hop frequency // get hop frequency
if (vio_hop_en) begin if (vio_hop_en) begin
nco_freq <= (hop_cnt == 1'b1) ? hop_ram_dout[0 +: 48] : nco_freq; // hop_cnt == 0, hop_ram_addr++
// hop_cnt == 1, read ram data
// hop_cnt == 2, ram data valid
nco_freq <= (hop_cnt == 32'd2) ? hop_ram_dout[0 +: 48] : nco_freq;
end end
else begin else begin
nco_freq <= {vio_hop_freq,32'b0}; nco_freq <= {vio_hop_freq,32'b0};
end end
if (vio_hop_en) begin if (vio_hop_en) begin
nco_update_req <= (hop_cnt == 2'd2) ? 1'b1 : 1'b0; // hop_cnt == 3, frequency valid
// hop_cnt == 4, hold for another extra clock cycle for safe capture
nco_update_req <= ((hop_cnt == 32'd3) || (hop_cnt == 32'd4)) ? 1'b1 : 1'b0;
end end
else begin else begin
nco_update_req <= (vio_hop_trig_d & ~vio_hop_trig) ? 1'b1 : 1'b0; nco_update_req <= (vio_hop_trig_d & ~vio_hop_trig) ? 1'b1 : 1'b0;
rfsoc_eval_nco/rfsoc_eval_nco.srcs/utils_1/imports/synth_1/system_top.dcp
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rfsoc_eval_nco/rfsoc_eval_nco.xpr
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@@ -66,13 +66,13 @@
<Option Name="WTVcsLaunchSim" Val="0"/> <Option Name="WTVcsLaunchSim" Val="0"/>
<Option Name="WTRivieraLaunchSim" Val="0"/> <Option Name="WTRivieraLaunchSim" Val="0"/>
<Option Name="WTActivehdlLaunchSim" Val="0"/> <Option Name="WTActivehdlLaunchSim" Val="0"/>
<Option Name="WTXSimExportSim" Val="125"/> <Option Name="WTXSimExportSim" Val="127"/>
<Option Name="WTModelSimExportSim" Val="125"/> <Option Name="WTModelSimExportSim" Val="127"/>
<Option Name="WTQuestaExportSim" Val="125"/> <Option Name="WTQuestaExportSim" Val="127"/>
<Option Name="WTIesExportSim" Val="0"/> <Option Name="WTIesExportSim" Val="0"/>
<Option Name="WTVcsExportSim" Val="125"/> <Option Name="WTVcsExportSim" Val="127"/>
<Option Name="WTRivieraExportSim" Val="125"/> <Option Name="WTRivieraExportSim" Val="127"/>
<Option Name="WTActivehdlExportSim" Val="125"/> <Option Name="WTActivehdlExportSim" Val="127"/>
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/> <Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
<Option Name="XSimRadix" Val="hex"/> <Option Name="XSimRadix" Val="hex"/>
<Option Name="XSimTimeUnit" Val="ns"/> <Option Name="XSimTimeUnit" Val="ns"/>
rfsoc_eval_nco/system_top.xsa
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rfsoc_eval_nco/vitis_classic_autobuild/source/config/app_config.h
+7 -7
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@@ -94,15 +94,15 @@
#endif #endif
#define LMK04828 #define LMK04828
#define LMX2594_ADC //#define LMX2594_ADC
#define LMX2594_DAC //#define LMX2594_DAC
#define AD9528 //#define AD9528
#define AD9361_REG //#define AD9361_REG
#define AD9361_API //#define AD9361_API
#define AD9653 //#define AD9653
#define AD9694 //#define AD9694
// AD9361 Configuration // AD9361 Configuration
#define SPI_INTERFACE_SPI_ENGINE #define SPI_INTERFACE_SPI_ENGINE
rfsoc_eval_nco/vitis_classic_autobuild/source/hwconfig.c
+90 -83
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@@ -18,6 +18,7 @@
// Standard // Standard
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include <math.h>
// Xilinx // Xilinx
#include "xgpiops.h" #include "xgpiops.h"
#include "drivers/axi_core/spi_engine/spi_engine.h" #include "drivers/axi_core/spi_engine/spi_engine.h"
@@ -882,36 +883,6 @@ int32_t Hardware_Init(void)
#ifdef AD9694 #ifdef AD9694
Status |= Hardware_AD9694Init(ad9694_inst, &ad9694_default_init_param); Status |= Hardware_AD9694Init(ad9694_inst, &ad9694_default_init_param);
#endif #endif
XBram freqHopBram;
XBram_Config *xbramConfigPtr;
xbramConfigPtr = XBram_LookupConfig(HOP_DEVICE_ID);
Status = XBram_CfgInitialize(&freqHopBram, xbramConfigPtr,
xbramConfigPtr->CtrlBaseAddress);
if(Status != SUCCESS) {
DBG_ERROR("");
}
Status = XBram_SelfTest(&freqHopBram, 0x00);
if(Status != SUCCESS) {
DBG_ERROR("");
}
uint64_t array[128];
uint64_t min_freq = 2800;
uint64_t max_freq = 4400;
uint64_t freq_num = 201;
uint64_t freq_step = (max_freq-min_freq)/(freq_num-1);
array[0] = freq_num;
for (int ii = 1; ii < freq_num; ii++)
{
array[ii] = min_freq + ii*freq_step;
}
size_t word_len = freqHopBram.Config.DataWidth/sizeof(uint64_t);
size_t array_len = sizeof(array);
size_t array_len_aligned = (array_len + word_len - 1) / word_len * word_len;
memcpy(freqHopBram.Config.MemBaseAddress, array, array_len_aligned);
#ifdef RFSOC #ifdef RFSOC
/* /*
@@ -928,31 +899,31 @@ int32_t Hardware_Init(void)
* *
*/ */
// // get & set mixer settings // get & set mixer settings
// XRFdc_Mixer_Settings Mixer_Settings_DAC; XRFdc_Mixer_Settings Mixer_Settings_DAC;
//
// // 3th channel // 3rd channel
// Status = XRFdc_GetMixerSettings(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1, Status = XRFdc_GetMixerSettings(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1,
// XRFDC_BLK_ID0, &Mixer_Settings_DAC); XRFDC_BLK_ID0, &Mixer_Settings_DAC);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
//
// Mixer_Settings_DAC.Freq = 1500; Mixer_Settings_DAC.Freq = 500;
//
// Status = XRFdc_SetMixerSettings(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1, Status = XRFdc_SetMixerSettings(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1,
// XRFDC_BLK_ID0, &Mixer_Settings_DAC); XRFDC_BLK_ID0, &Mixer_Settings_DAC);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
//
// mdelay(100); mdelay(100);
//
// Status = XRFdc_UpdateEvent(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1, Status = XRFdc_UpdateEvent(&RFdc, XRFDC_DAC_TILE, XRFDC_TILE_ID1,
// XRFDC_BLK_ID0, XRFDC_EVENT_MIXER); XRFDC_BLK_ID0, XRFDC_EVENT_MIXER);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
/* /*
* ADC Mapping: * ADC Mapping:
@@ -962,38 +933,74 @@ int32_t Hardware_Init(void)
* 3 (VIN1_01) 225 (XRFDC_TILE_ID1) ADC 0 (XRFDC_BLK_ID0) * 3 (VIN1_01) 225 (XRFDC_TILE_ID1) ADC 0 (XRFDC_BLK_ID0)
* 4 (VIN1_23) 225 (XRFDC_TILE_ID1) ADC 1 (XRFDC_BLK_ID1) * 4 (VIN1_23) 225 (XRFDC_TILE_ID1) ADC 1 (XRFDC_BLK_ID1)
* 5 (VIN2_01) 226 (XRFDC_TILE_ID2) ADC 0 (XRFDC_BLK_ID0) * 5 (VIN2_01) 226 (XRFDC_TILE_ID2) ADC 0 (XRFDC_BLK_ID0)
* 6 (VIN2_23) 227 (XRFDC_TILE_ID2) ADC 1 (XRFDC_BLK_ID1) * 6 (VIN2_23) 226 (XRFDC_TILE_ID2) ADC 1 (XRFDC_BLK_ID1)
* 7 (VIN3_01) 224 (XRFDC_TILE_ID0) ADC 0 (XRFDC_BLK_ID0) * 7 (VIN3_01) 227 (XRFDC_TILE_ID3) ADC 0 (XRFDC_BLK_ID0)
* 8 (VIN3_23) 227 (XRFDC_TILE_ID3) ADC 1 (XRFDC_BLK_ID1) * 8 (VIN3_23) 227 (XRFDC_TILE_ID3) ADC 1 (XRFDC_BLK_ID1)
* *
*/ */
// // get & set mixer settings // get & set mixer settings
// XRFdc_Mixer_Settings Mixer_Settings_ADC; XRFdc_Mixer_Settings Mixer_Settings_ADC;
//
// // 3rd channel // 7th channel
// Status = XRFdc_GetMixerSettings(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID1, Status = XRFdc_GetMixerSettings(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID3,
// XRFDC_BLK_ID0, &Mixer_Settings_ADC); XRFDC_BLK_ID0, &Mixer_Settings_ADC);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
//
// Mixer_Settings_ADC.Freq = 1500; Mixer_Settings_ADC.Freq = 500;
// Mixer_Settings_ADC.EventSource = XRFDC_EVNT_SRC_TILE; Mixer_Settings_ADC.EventSource = XRFDC_EVNT_SRC_TILE;
//
// Status = XRFdc_SetMixerSettings(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID1, Status = XRFdc_SetMixerSettings(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID3,
// XRFDC_BLK_ID0, &Mixer_Settings_ADC); XRFDC_BLK_ID0, &Mixer_Settings_ADC);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
//
// mdelay(100); mdelay(100);
//
// Status = XRFdc_UpdateEvent(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID1, Status = XRFdc_UpdateEvent(&RFdc, XRFDC_ADC_TILE, XRFDC_TILE_ID3,
// XRFDC_BLK_ID0, XRFDC_EVENT_MIXER); XRFDC_BLK_ID0, XRFDC_EVENT_MIXER);
// if (Status != XST_SUCCESS) { if (Status != XST_SUCCESS) {
// return XST_FAILURE; return XST_FAILURE;
// } }
// hop ram
XBram freqHopBram;
XBram_Config *xbramConfigPtr;
xbramConfigPtr = XBram_LookupConfig(HOP_DEVICE_ID);
Status = XBram_CfgInitialize(&freqHopBram, xbramConfigPtr,
xbramConfigPtr->CtrlBaseAddress);
if(Status != SUCCESS) {
DBG_ERROR("");
}
Status = XBram_SelfTest(&freqHopBram, 0x00);
if(Status != SUCCESS) {
DBG_ERROR("");
}
uint64_t array[1024];
double min_freq = 500;
double max_freq = 2100;
double freq_step = 50;
uint64_t total_freq_num = (uint64_t)(floor((max_freq-min_freq)/freq_step)+1);
uint64_t hop_freq_num = (uint64_t)(floor((total_freq_num-1)/2)*3);
array[0] = hop_freq_num;
for (int ii = 0; ii < hop_freq_num/3; ii++)
{
array[3*ii + 1] = (uint64_t)(min_freq/4800*pow(2,48));
array[3*ii + 2] = (uint64_t)((min_freq + (2*ii+1)*freq_step)/4800*pow(2,48));
array[3*ii + 3] = (uint64_t)((min_freq + (2*ii+2)*freq_step)/4800*pow(2,48));
}
size_t word_len = freqHopBram.Config.DataWidth/sizeof(uint64_t);
size_t array_len = sizeof(array);
size_t array_len_aligned = (array_len + word_len - 1) / word_len * word_len;
memcpy(freqHopBram.Config.MemBaseAddress, array, array_len_aligned);
#endif #endif