forked from gatsby/df_datalink
fix: 接收帧类型改为通过数据读取
This commit is contained in:
+34
-52
@@ -36,7 +36,7 @@
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#define _APP_VER_PATCH (_APP_VER & 0x0000FFFF)
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/*********** Debug Info Level ************/
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// #define _DEBUG_LEVEL 1
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// #define _DEBUG_LEVEL 1
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// 3 - print all debug info
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// 2 - print warnings and errors
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// 1 - print only errors
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@@ -127,7 +127,7 @@
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#define AD9361_GPIO_OUTPUT 1
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#define AD9361_GPIO_DISABLE 0
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#define AD9361_GPIO_ENABLE 1
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// -- AD9361-1 SPI Engine Configuration
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// -- AD9361 SPI Engine Configuration
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#define AD9361_SPI_DEVICE_ID 0
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#define AD9361_SPI_ENGINE_REF_CLK FCLK_CLK0_HZ
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#define AD9361_SPI_ENGINE_MAX_SPEED 5000000
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@@ -137,58 +137,40 @@
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#define AD9361_TIMEOUT_TH 2000
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#define AD9361_1_SPI_CS 0x01
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#define AD9361_2_SPI_CS 0x02
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#define AD9361_2_TIMEOUT_TH 2000
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// -- AD9361-1 GPIO
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#define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 6)
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#define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 7)
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#define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 8)
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#define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 9)
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#define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 10)
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#define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 11)
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#define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 12)
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#define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 13)
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#define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 14)
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#define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 15)
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#define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 16)
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#define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 17)
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#define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 18)
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#define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 19)
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#define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 20)
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#define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 21)
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#define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 4)
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#define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 5)
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#define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 6)
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#define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 7)
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#define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 8)
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#define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 9)
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#define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 10)
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#define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 11)
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#define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 12)
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#define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 13)
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#define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 14)
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#define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 15)
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#define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 16)
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#define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 17)
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#define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 18)
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#define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 19)
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// -- AD9361-2 GPIO
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#define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 22)
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#define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 23)
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#define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 24)
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#define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 25)
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#define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 26)
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#define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 27)
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#define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 28)
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#define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 29)
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#define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 30)
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#define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 31)
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#define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 32)
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#define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 33)
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#define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 34)
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#define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 35)
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#define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 36)
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#define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 37)
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// AD9361-Status Code
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#define AD9361_SYNC (AD9361_GPIO_OFFSET + 38)
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#define AD9361_RX_FIFO_RST (AD9361_GPIO_OFFSET + 39)
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#define AD9361_1_CAL_START (AD9361_GPIO_OFFSET + 40)
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#define AD9361_2_CAL_START (AD9361_GPIO_OFFSET + 41)
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#define AD9361_RECAL (AD9361_GPIO_OFFSET + 42)
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#define AD9361_TX_SWITCH (AD9361_GPIO_OFFSET + 43)
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#define AD9361_1_CAL_DONE (AD9361_GPIO_OFFSET + 44)
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#define AD9361_2_CAL_DONE (AD9361_GPIO_OFFSET + 45)
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#define AD9361_CAL_RESULT (AD9361_GPIO_OFFSET + 46)
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typedef enum
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{
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TX_FREQ_125,
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TX_FREQ_126,
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TX_FREQ_4125
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} ad9361TxFreq;
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#define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 20)
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#define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 21)
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#define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 22)
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#define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 23)
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#define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 24)
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#define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 25)
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#define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 26)
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#define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 27)
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#define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 28)
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#define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 29)
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#define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 30)
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#define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 31)
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#define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 32)
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#define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 33)
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#define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 34)
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#define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 35)
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// HMC7044 Configurations
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#define HMC7044_GPIO_DEVICE_ID 0
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@@ -23,7 +23,6 @@
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/************************** Function Prototypes ******************************/
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int32_t Hardware_Init(void);
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int32_t Hardware_SwitchFreq(struct ad9361_reg_dev *dev, ad9361TxFreq freq);
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int8_t Hardware_GetAD9361Temp_1(void);
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int8_t Hardware_GetAD9361Temp_2(void);
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uint8_t Hardware_GetAD9361LockStatus(void);
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+24
-24
@@ -42,7 +42,7 @@
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/************************** Function Prototypes ******************************/
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int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr);
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void Phy_IntrHandler(void *context);
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void PeriodicPull_Handler(void *callBackRef);
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void PeriodicPoll_Handler(void *callBackRef);
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void AppTimer_IntrHandler(void *context);
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void Systembus_RxIntrHandler(void *context);
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void Systembus_TxIntrHandler(void *context);
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@@ -53,8 +53,8 @@ struct callback_desc phy_callback_desc = {
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.ctx = NULL
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};
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struct callback_desc periodicpull_callback_desc = {
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.callback = PeriodicPull_Handler,
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struct callback_desc periodicpoll_callback_desc = {
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.callback = PeriodicPoll_Handler,
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.ctx = NULL
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};
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@@ -76,10 +76,10 @@ struct callback_desc apptimer_callback_desc = {
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//L2_CONFIG linkConfig = {
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// .myType = L2_NODE_HEAD,
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// .clustId = 1,
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// .myId = 1,
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// .headId = 1,
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// .netScale = 3,
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// .clustId = 1U,
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// .myId = 1U,
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// .headId = 1U,
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// .netScale = 10U,
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// .serviceRate = L2_SVC_512K,
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// .phyInstPtr = NULL, // physical layer reference
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// .tmcInstPtr = NULL
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@@ -87,10 +87,10 @@ struct callback_desc apptimer_callback_desc = {
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L2_CONFIG linkConfig = {
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.myType = L2_NODE_MEMBER,
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.clustId = 1,
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.myId = 2,
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.headId = 1,
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.netScale = 10,
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.clustId = 1U,
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.myId = 2U,
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.headId = 1U,
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.netScale = 10U,
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.serviceRate = L2_SVC_512K,
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.phyInstPtr = NULL, // physical layer reference
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.tmcInstPtr = NULL
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@@ -115,21 +115,22 @@ static PHY_CONFIG phyConfig = {
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TMC_CONFIG tmcConfig = {
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.baseAddr = TIME_CONTROLLER_BASEADDR,
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.reset = 10
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.reset = 10U
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};
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static SYSBUS_CONFIG sysbusConfig = {
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.baseAddr = SYSBUS_BASE_ADDR,
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.txQueueMax = 16,
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.rxQueueMax = 16
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.txQueueMax = 16U,
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.rxQueueMax = 16U
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};
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/*********************** Driver Instance Definitions **************************/
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static struct irq_ctrl_desc *intcDescPtr; // General interrupt controller descriptor
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static struct timer_desc *logTmPtr;
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static SYSBUS *sysbusDescPtr;
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static PHY_INST *phyInstPtr;
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static struct irq_ctrl_desc *intcDescPtr = NULL; // General interrupt controller descriptor
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static struct timer_desc *logTmPtr = NULL;
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static SYSBUS *sysbusDescPtr = NULL;
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static PHY_INST *phyInstPtr = NULL;
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static TMC_INST *tmcInstPtr = NULL;
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L2_INST *linkInstPtr;
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L2_INST *linkInstPtr = NULL;
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#ifdef HSJL_GE // Zynq MPSoC (Zynq UltraScale+)
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void MetalLogHandler(enum metal_log_level level, const char *format, ...)
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@@ -225,7 +226,7 @@ int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr)
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return Status;
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}
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// Connect the interrupt service routine isr1 to the interrupt controller
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpull_callback_desc);
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Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpoll_callback_desc);
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if (Status != SUCCESS)
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{
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DBG_ERROR("PHY_INTR register callback FAILED, ErrorCode: %" PRId32 ".\n", Status);
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@@ -317,17 +318,16 @@ void Phy_IntrHandler(void *context)
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Phy_UpdateState(phyInstPtr);
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} // PhyIntr_Handler
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/****************************************************************************/
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/**
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* Handler of periodic 5ms interrupt
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* Handler of periodic 2 ms interrupt
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*
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* @param callBackRef is the linklayer instance pointer.
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*
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* @return None.
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*
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*****************************************************************************/
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void PeriodicPull_Handler(void *callBackRef)
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void PeriodicPoll_Handler(void *callBackRef)
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{
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int32_t Status;
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Status = Linklayer_Proc(linkInstPtr);
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@@ -336,7 +336,7 @@ void PeriodicPull_Handler(void *callBackRef)
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DBG_ERROR("Link layer runs failed, with error code: %" PRId32 "\n", Status);
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_nop_();
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}
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} // PeriodicPull_Handler
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} // PeriodicPoll_Handler
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/*****************************************************************************/
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/**
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@@ -131,7 +131,6 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
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ASSERT(instPtr != NULL);
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PHY_INST *phyRef = instPtr->config.phyInstPtr;
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bool isValid;
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L2_FRAME_TYPE recvType = L2_GetLastFrameType(instPtr);
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isValid = false;
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// Update frame state.
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if (Phy_IsFrameValid(phyRef) == false)
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@@ -145,6 +144,9 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
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Phy_RetrieveRecvData(phyRef, instPtr->recvPktData);
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instPtr->log.frameRecv++;
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L2_MSG_COMMON *msg = (L2_MSG_COMMON *) instPtr->recvPktData;
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L2_FRAME_TYPE recvType = msg->msgType;
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// Update frame state.
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switch (recvType)
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{
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@@ -459,7 +461,7 @@ size_t L2_GetSvcPacketLen(L2_SVC_RATE l2SvcRate)
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case L2_SVC_2M:
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return sizeof(L2_MSG_SVC_2M);
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default:
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DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate);
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DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", l2SvcRate);
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return EPARAM;
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}
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}
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@@ -484,7 +486,7 @@ size_t L2_GetSvcPayloadLen(L2_SVC_RATE l2SvcRate)
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case L2_SVC_2M:
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return L2_PAYLOAD_LEN_SVC_2M;
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default:
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DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate);
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DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", l2SvcRate);
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return EPARAM;
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}
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}
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@@ -111,7 +111,7 @@ static int32_t ScanMsg_Packing(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dst
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message->common.slotNum = L2_GetNextSlotNum(instPtr);
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message->common.src = L2_GetNodeId(instPtr);
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message->common.dst = dstId;
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message->common.msgType = L2_FRAME_ADV;
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message->common.msgType = L2_FRAME_ACK;
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// insert position and speed info
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SysMonitor_GetSysinfo(&(instPtr->sysInfo));
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@@ -222,7 +222,7 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
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Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
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if (Status != SUCCESS)
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{
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DBG_ERROR("Failed to compute time deviation.\n")
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DBG_ERROR("Failed to compute time deviation.\n");
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break;
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}
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@@ -294,7 +294,7 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
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Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
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if (Status != SUCCESS)
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{
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DBG_ERROR("Failed to compute time deviation.\n")
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DBG_ERROR("Failed to compute time deviation.\n");
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break;
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}
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@@ -472,7 +472,7 @@ static int32_t Service_PktHandler128K(L2_INST *instPtr, uint8_t *msg)
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Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
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if (Status != SUCCESS)
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{
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DBG_ERROR("Failed to compute time deviation.\n")
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DBG_ERROR("Failed to compute time deviation.\n");
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return Status;
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}
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@@ -547,7 +547,7 @@ static int32_t Service_PktHandler512K(L2_INST *instPtr, uint8_t *msg)
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Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
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if (Status != SUCCESS)
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{
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DBG_ERROR("Failed to compute time deviation.\n")
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DBG_ERROR("Failed to compute time deviation.\n");
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return Status;
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}
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@@ -622,7 +622,7 @@ static int32_t Service_PktHandler2M(L2_INST *instPtr, uint8_t *msg)
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Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
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if (Status != SUCCESS)
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{
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DBG_ERROR("Failed to compute time deviation.\n")
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DBG_ERROR("Failed to compute time deviation.\n");
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return Status;
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}
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