fix: 接收帧类型改为通过数据读取

This commit is contained in:
2025-05-25 23:16:16 +08:00
parent 46ca71c78a
commit e94f2b3848
6 changed files with 69 additions and 86 deletions
+34 -52
View File
@@ -36,7 +36,7 @@
#define _APP_VER_PATCH (_APP_VER & 0x0000FFFF) #define _APP_VER_PATCH (_APP_VER & 0x0000FFFF)
/*********** Debug Info Level ************/ /*********** Debug Info Level ************/
// #define _DEBUG_LEVEL 1 // #define _DEBUG_LEVEL 1
// 3 - print all debug info // 3 - print all debug info
// 2 - print warnings and errors // 2 - print warnings and errors
// 1 - print only errors // 1 - print only errors
@@ -127,7 +127,7 @@
#define AD9361_GPIO_OUTPUT 1 #define AD9361_GPIO_OUTPUT 1
#define AD9361_GPIO_DISABLE 0 #define AD9361_GPIO_DISABLE 0
#define AD9361_GPIO_ENABLE 1 #define AD9361_GPIO_ENABLE 1
// -- AD9361-1 SPI Engine Configuration // -- AD9361 SPI Engine Configuration
#define AD9361_SPI_DEVICE_ID 0 #define AD9361_SPI_DEVICE_ID 0
#define AD9361_SPI_ENGINE_REF_CLK FCLK_CLK0_HZ #define AD9361_SPI_ENGINE_REF_CLK FCLK_CLK0_HZ
#define AD9361_SPI_ENGINE_MAX_SPEED 5000000 #define AD9361_SPI_ENGINE_MAX_SPEED 5000000
@@ -137,58 +137,40 @@
#define AD9361_TIMEOUT_TH 2000 #define AD9361_TIMEOUT_TH 2000
#define AD9361_1_SPI_CS 0x01 #define AD9361_1_SPI_CS 0x01
#define AD9361_2_SPI_CS 0x02 #define AD9361_2_SPI_CS 0x02
#define AD9361_2_TIMEOUT_TH 2000
// -- AD9361-1 GPIO // -- AD9361-1 GPIO
#define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 6) #define AD9361_1_TXNRX (AD9361_GPIO_OFFSET + 4)
#define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 7) #define AD9361_1_ENABLE (AD9361_GPIO_OFFSET + 5)
#define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 8) #define AD9361_1_EN_AGC (AD9361_GPIO_OFFSET + 6)
#define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 9) #define AD9361_1_RESET_B (AD9361_GPIO_OFFSET + 7)
#define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 10) #define AD9361_1_CTRL_OUT0 (AD9361_GPIO_OFFSET + 8)
#define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 11) #define AD9361_1_CTRL_OUT1 (AD9361_GPIO_OFFSET + 9)
#define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 12) #define AD9361_1_CTRL_OUT2 (AD9361_GPIO_OFFSET + 10)
#define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 13) #define AD9361_1_CTRL_OUT3 (AD9361_GPIO_OFFSET + 11)
#define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 14) #define AD9361_1_CTRL_OUT4 (AD9361_GPIO_OFFSET + 12)
#define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 15) #define AD9361_1_CTRL_OUT5 (AD9361_GPIO_OFFSET + 13)
#define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 16) #define AD9361_1_CTRL_OUT6 (AD9361_GPIO_OFFSET + 14)
#define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 17) #define AD9361_1_CTRL_OUT7 (AD9361_GPIO_OFFSET + 15)
#define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 18) #define AD9361_1_CTRL_IN0 (AD9361_GPIO_OFFSET + 16)
#define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 19) #define AD9361_1_CTRL_IN1 (AD9361_GPIO_OFFSET + 17)
#define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 20) #define AD9361_1_CTRL_IN2 (AD9361_GPIO_OFFSET + 18)
#define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 21) #define AD9361_1_CTRL_IN3 (AD9361_GPIO_OFFSET + 19)
// -- AD9361-2 GPIO // -- AD9361-2 GPIO
#define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 22) #define AD9361_2_TXNRX (AD9361_GPIO_OFFSET + 20)
#define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 23) #define AD9361_2_ENABLE (AD9361_GPIO_OFFSET + 21)
#define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 24) #define AD9361_2_EN_AGC (AD9361_GPIO_OFFSET + 22)
#define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 25) #define AD9361_2_RESET_B (AD9361_GPIO_OFFSET + 23)
#define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 26) #define AD9361_2_CTRL_OUT0 (AD9361_GPIO_OFFSET + 24)
#define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 27) #define AD9361_2_CTRL_OUT1 (AD9361_GPIO_OFFSET + 25)
#define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 28) #define AD9361_2_CTRL_OUT2 (AD9361_GPIO_OFFSET + 26)
#define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 29) #define AD9361_2_CTRL_OUT3 (AD9361_GPIO_OFFSET + 27)
#define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 30) #define AD9361_2_CTRL_OUT4 (AD9361_GPIO_OFFSET + 28)
#define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 31) #define AD9361_2_CTRL_OUT5 (AD9361_GPIO_OFFSET + 29)
#define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 32) #define AD9361_2_CTRL_OUT6 (AD9361_GPIO_OFFSET + 30)
#define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 33) #define AD9361_2_CTRL_OUT7 (AD9361_GPIO_OFFSET + 31)
#define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 34) #define AD9361_2_CTRL_IN0 (AD9361_GPIO_OFFSET + 32)
#define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 35) #define AD9361_2_CTRL_IN1 (AD9361_GPIO_OFFSET + 33)
#define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 36) #define AD9361_2_CTRL_IN2 (AD9361_GPIO_OFFSET + 34)
#define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 37) #define AD9361_2_CTRL_IN3 (AD9361_GPIO_OFFSET + 35)
// AD9361-Status Code
#define AD9361_SYNC (AD9361_GPIO_OFFSET + 38)
#define AD9361_RX_FIFO_RST (AD9361_GPIO_OFFSET + 39)
#define AD9361_1_CAL_START (AD9361_GPIO_OFFSET + 40)
#define AD9361_2_CAL_START (AD9361_GPIO_OFFSET + 41)
#define AD9361_RECAL (AD9361_GPIO_OFFSET + 42)
#define AD9361_TX_SWITCH (AD9361_GPIO_OFFSET + 43)
#define AD9361_1_CAL_DONE (AD9361_GPIO_OFFSET + 44)
#define AD9361_2_CAL_DONE (AD9361_GPIO_OFFSET + 45)
#define AD9361_CAL_RESULT (AD9361_GPIO_OFFSET + 46)
typedef enum
{
TX_FREQ_125,
TX_FREQ_126,
TX_FREQ_4125
} ad9361TxFreq;
// HMC7044 Configurations // HMC7044 Configurations
#define HMC7044_GPIO_DEVICE_ID 0 #define HMC7044_GPIO_DEVICE_ID 0
-1
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@@ -23,7 +23,6 @@
/************************** Function Prototypes ******************************/ /************************** Function Prototypes ******************************/
int32_t Hardware_Init(void); int32_t Hardware_Init(void);
int32_t Hardware_SwitchFreq(struct ad9361_reg_dev *dev, ad9361TxFreq freq);
int8_t Hardware_GetAD9361Temp_1(void); int8_t Hardware_GetAD9361Temp_1(void);
int8_t Hardware_GetAD9361Temp_2(void); int8_t Hardware_GetAD9361Temp_2(void);
uint8_t Hardware_GetAD9361LockStatus(void); uint8_t Hardware_GetAD9361LockStatus(void);
+24 -24
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@@ -42,7 +42,7 @@
/************************** Function Prototypes ******************************/ /************************** Function Prototypes ******************************/
int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr); int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr);
void Phy_IntrHandler(void *context); void Phy_IntrHandler(void *context);
void PeriodicPull_Handler(void *callBackRef); void PeriodicPoll_Handler(void *callBackRef);
void AppTimer_IntrHandler(void *context); void AppTimer_IntrHandler(void *context);
void Systembus_RxIntrHandler(void *context); void Systembus_RxIntrHandler(void *context);
void Systembus_TxIntrHandler(void *context); void Systembus_TxIntrHandler(void *context);
@@ -53,8 +53,8 @@ struct callback_desc phy_callback_desc = {
.ctx = NULL .ctx = NULL
}; };
struct callback_desc periodicpull_callback_desc = { struct callback_desc periodicpoll_callback_desc = {
.callback = PeriodicPull_Handler, .callback = PeriodicPoll_Handler,
.ctx = NULL .ctx = NULL
}; };
@@ -76,10 +76,10 @@ struct callback_desc apptimer_callback_desc = {
//L2_CONFIG linkConfig = { //L2_CONFIG linkConfig = {
// .myType = L2_NODE_HEAD, // .myType = L2_NODE_HEAD,
// .clustId = 1, // .clustId = 1U,
// .myId = 1, // .myId = 1U,
// .headId = 1, // .headId = 1U,
// .netScale = 3, // .netScale = 10U,
// .serviceRate = L2_SVC_512K, // .serviceRate = L2_SVC_512K,
// .phyInstPtr = NULL, // physical layer reference // .phyInstPtr = NULL, // physical layer reference
// .tmcInstPtr = NULL // .tmcInstPtr = NULL
@@ -87,10 +87,10 @@ struct callback_desc apptimer_callback_desc = {
L2_CONFIG linkConfig = { L2_CONFIG linkConfig = {
.myType = L2_NODE_MEMBER, .myType = L2_NODE_MEMBER,
.clustId = 1, .clustId = 1U,
.myId = 2, .myId = 2U,
.headId = 1, .headId = 1U,
.netScale = 10, .netScale = 10U,
.serviceRate = L2_SVC_512K, .serviceRate = L2_SVC_512K,
.phyInstPtr = NULL, // physical layer reference .phyInstPtr = NULL, // physical layer reference
.tmcInstPtr = NULL .tmcInstPtr = NULL
@@ -115,21 +115,22 @@ static PHY_CONFIG phyConfig = {
TMC_CONFIG tmcConfig = { TMC_CONFIG tmcConfig = {
.baseAddr = TIME_CONTROLLER_BASEADDR, .baseAddr = TIME_CONTROLLER_BASEADDR,
.reset = 10 .reset = 10U
}; };
static SYSBUS_CONFIG sysbusConfig = { static SYSBUS_CONFIG sysbusConfig = {
.baseAddr = SYSBUS_BASE_ADDR, .baseAddr = SYSBUS_BASE_ADDR,
.txQueueMax = 16, .txQueueMax = 16U,
.rxQueueMax = 16 .rxQueueMax = 16U
}; };
/*********************** Driver Instance Definitions **************************/ /*********************** Driver Instance Definitions **************************/
static struct irq_ctrl_desc *intcDescPtr; // General interrupt controller descriptor static struct irq_ctrl_desc *intcDescPtr = NULL; // General interrupt controller descriptor
static struct timer_desc *logTmPtr; static struct timer_desc *logTmPtr = NULL;
static SYSBUS *sysbusDescPtr; static SYSBUS *sysbusDescPtr = NULL;
static PHY_INST *phyInstPtr; static PHY_INST *phyInstPtr = NULL;
static TMC_INST *tmcInstPtr = NULL; static TMC_INST *tmcInstPtr = NULL;
L2_INST *linkInstPtr; L2_INST *linkInstPtr = NULL;
#ifdef HSJL_GE // Zynq MPSoC (Zynq UltraScale+) #ifdef HSJL_GE // Zynq MPSoC (Zynq UltraScale+)
void MetalLogHandler(enum metal_log_level level, const char *format, ...) void MetalLogHandler(enum metal_log_level level, const char *format, ...)
@@ -225,7 +226,7 @@ int32_t SetupInterruptSystem(struct irq_ctrl_desc *descPtr)
return Status; return Status;
} }
// Connect the interrupt service routine isr1 to the interrupt controller // Connect the interrupt service routine isr1 to the interrupt controller
Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpull_callback_desc); Status = irq_register_callback(descPtr, PERIODIC_5MS_INTR_ID, &periodicpoll_callback_desc);
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("PHY_INTR register callback FAILED, ErrorCode: %" PRId32 ".\n", Status); DBG_ERROR("PHY_INTR register callback FAILED, ErrorCode: %" PRId32 ".\n", Status);
@@ -317,17 +318,16 @@ void Phy_IntrHandler(void *context)
Phy_UpdateState(phyInstPtr); Phy_UpdateState(phyInstPtr);
} // PhyIntr_Handler } // PhyIntr_Handler
/****************************************************************************/ /****************************************************************************/
/** /**
* Handler of periodic 5ms interrupt * Handler of periodic 2 ms interrupt
* *
* @param callBackRef is the linklayer instance pointer. * @param callBackRef is the linklayer instance pointer.
* *
* @return None. * @return None.
* *
*****************************************************************************/ *****************************************************************************/
void PeriodicPull_Handler(void *callBackRef) void PeriodicPoll_Handler(void *callBackRef)
{ {
int32_t Status; int32_t Status;
Status = Linklayer_Proc(linkInstPtr); Status = Linklayer_Proc(linkInstPtr);
@@ -336,7 +336,7 @@ void PeriodicPull_Handler(void *callBackRef)
DBG_ERROR("Link layer runs failed, with error code: %" PRId32 "\n", Status); DBG_ERROR("Link layer runs failed, with error code: %" PRId32 "\n", Status);
_nop_(); _nop_();
} }
} // PeriodicPull_Handler } // PeriodicPoll_Handler
/*****************************************************************************/ /*****************************************************************************/
/** /**
+5 -3
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@@ -131,7 +131,6 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
ASSERT(instPtr != NULL); ASSERT(instPtr != NULL);
PHY_INST *phyRef = instPtr->config.phyInstPtr; PHY_INST *phyRef = instPtr->config.phyInstPtr;
bool isValid; bool isValid;
L2_FRAME_TYPE recvType = L2_GetLastFrameType(instPtr);
isValid = false; isValid = false;
// Update frame state. // Update frame state.
if (Phy_IsFrameValid(phyRef) == false) if (Phy_IsFrameValid(phyRef) == false)
@@ -145,6 +144,9 @@ static void L2_FrameStateUpdate(L2_INST *instPtr)
Phy_RetrieveRecvData(phyRef, instPtr->recvPktData); Phy_RetrieveRecvData(phyRef, instPtr->recvPktData);
instPtr->log.frameRecv++; instPtr->log.frameRecv++;
L2_MSG_COMMON *msg = (L2_MSG_COMMON *) instPtr->recvPktData;
L2_FRAME_TYPE recvType = msg->msgType;
// Update frame state. // Update frame state.
switch (recvType) switch (recvType)
{ {
@@ -459,7 +461,7 @@ size_t L2_GetSvcPacketLen(L2_SVC_RATE l2SvcRate)
case L2_SVC_2M: case L2_SVC_2M:
return sizeof(L2_MSG_SVC_2M); return sizeof(L2_MSG_SVC_2M);
default: default:
DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate); DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", l2SvcRate);
return EPARAM; return EPARAM;
} }
} }
@@ -484,7 +486,7 @@ size_t L2_GetSvcPayloadLen(L2_SVC_RATE l2SvcRate)
case L2_SVC_2M: case L2_SVC_2M:
return L2_PAYLOAD_LEN_SVC_2M; return L2_PAYLOAD_LEN_SVC_2M;
default: default:
DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", instPtr->config.serviceRate); DBG_ERROR("Unsupported service rate: %" PRId8 ".\n", l2SvcRate);
return EPARAM; return EPARAM;
} }
} }
+3 -3
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@@ -111,7 +111,7 @@ static int32_t ScanMsg_Packing(L2_INST *instPtr, L2_FRAME_TYPE type, uint8_t dst
message->common.slotNum = L2_GetNextSlotNum(instPtr); message->common.slotNum = L2_GetNextSlotNum(instPtr);
message->common.src = L2_GetNodeId(instPtr); message->common.src = L2_GetNodeId(instPtr);
message->common.dst = dstId; message->common.dst = dstId;
message->common.msgType = L2_FRAME_ADV; message->common.msgType = L2_FRAME_ACK;
// insert position and speed info // insert position and speed info
SysMonitor_GetSysinfo(&(instPtr->sysInfo)); SysMonitor_GetSysinfo(&(instPtr->sysInfo));
@@ -222,7 +222,7 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev)); Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("Failed to compute time deviation.\n") DBG_ERROR("Failed to compute time deviation.\n");
break; break;
} }
@@ -294,7 +294,7 @@ int32_t L2_Scan_PktHandler(L2_INST *instPtr, uint8_t *msg)
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev)); Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("Failed to compute time deviation.\n") DBG_ERROR("Failed to compute time deviation.\n");
break; break;
} }
+3 -3
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@@ -472,7 +472,7 @@ static int32_t Service_PktHandler128K(L2_INST *instPtr, uint8_t *msg)
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev)); Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("Failed to compute time deviation.\n") DBG_ERROR("Failed to compute time deviation.\n");
return Status; return Status;
} }
@@ -547,7 +547,7 @@ static int32_t Service_PktHandler512K(L2_INST *instPtr, uint8_t *msg)
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev)); Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("Failed to compute time deviation.\n") DBG_ERROR("Failed to compute time deviation.\n");
return Status; return Status;
} }
@@ -622,7 +622,7 @@ static int32_t Service_PktHandler2M(L2_INST *instPtr, uint8_t *msg)
Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev)); Status = L2_GetTimeDeviation(instPtr, frameNum, slotNum, true, &(instPtr->log.timeDev));
if (Status != SUCCESS) if (Status != SUCCESS)
{ {
DBG_ERROR("Failed to compute time deviation.\n") DBG_ERROR("Failed to compute time deviation.\n");
return Status; return Status;
} }