update blog titles

split tiles of note & review serie into two lines, making it neat. but in archive view, the lines are still splited, which is a little annoying

source/_posts/2020-11-27-josh-verilog-part-1.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 1 — 初识 HDL 设计方法）"
+title: "Josh's Note — Verilog<br>Part 1 初识 HDL 设计方法"
 date: 2020-11-27 22:58:07
 tags:
   - Verilog

source/_posts/2020-11-28-josh-verilog-part-2.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 2 — Verilog 语言基础）"
+title: "Josh's Note — Verilog<br>Part 2 Verilog 语言基础"
 date: 2020-11-28 11:42:50
 tags:
   - Verilog

source/_posts/2020-11-30-josh-verilog-part-3.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 3 — 描述方式和设计层次）"
+title: "Josh's Note — Verilog<br>Part 3 描述方式和设计层次"
 date: 2020-11-30 00:57:49
 tags:
   - Verilog

source/_posts/2020-12-02-josh-verilog-part-4.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 4 — RTL 概念与常用 RTL 建模）"
+title: "Josh's Note — Verilog<br>Part 4 RTL 概念与常用 RTL 建模"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2020-12-05-josh-verilog-part-5.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 5 — RTL 设计与编码指导）"
+title: "Josh's Note — Verilog<br>Part 5 RTL 设计与编码指导"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2021-12-08-josh-msp-part-1.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: 多抽样率信号处理 (Part 1 — 抽样率转换)"
+title: "Josh's Note — 多抽样率信号处理<br>Part 1 抽样率转换"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2022-05-30-josh-systemverilog-1.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: SystemVerilog 验证（Part 1 — 验证导论）"
+title: "Josh's Note — SystemVerilog 验证<br>Part 1 验证导论"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2022-05-31-josh-systemverilog-2.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: SystemVerilog 验证（Part 2 — 数据类型）"
+title: "Josh's Note — SystemVerilog 验证<br>Part 2 数据类型"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2022-06-02-josh-systemverilog-3.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: SystemVerilog 验证（Part 3 — 过程语句和子程序）"
+title: "Josh's Note — SystemVerilog 验证<br>Part 3 过程语句和子程序"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-14-josh-dsp-part-1.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 1 — 离散时间信号和系统分析基础）"
+title: "Josh's Review — 数字信号处理<br>Part 1 离散时间信号和系统分析基础"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-14-josh-dsp-part-2.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 2 — 离散傅里叶级数 DFS）"
+title: "Josh's Review — 数字信号处理<br>Part 2 离散傅里叶级数 DFS"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-14-josh-dsp-part-3.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 3 — 离散傅里叶变换 DFT）"
+title: "Josh's Review — 数字信号处理<br>Part 3 离散傅里叶变换 DFT"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-14-josh-dsp-part-4.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 4 — 快速傅里叶变换 FFT）"
+title: "Josh's Review — 数字信号处理<br>Part 4 快速傅里叶变换 FFT"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-15-josh-dsp-part-5.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 5 — 部分 FFT 蝶形图）"
+title: "Josh's Review — 数字信号处理<br>Part 5 部分 FFT 蝶形图"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-15-josh-dsp-part-6.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 6 — 数字滤波器的基本结构）"
+title: "Josh's Review — 数字信号处理<br>Part 6 数字滤波器的基本结构"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-15-josh-dsp-part-7.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Review: 数字信号处理（Part 7 — 数字滤波器设计）"
+title: "Josh's Review — 数字信号处理<br>Part 7 数字滤波器设计"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-16-josh-verilog-part-6.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 6 —— 如何写好状态机）"
+title: "Josh's Note — Verilog<br>Part 6 如何写好状态机"
 mathjax: false
 comments: true
 copyright: true

source/_posts/2023-04-16-josh-verilog-part-7.md

@@ -1,5 +1,5 @@
 ---
-title: "Josh's Notes: Verilog（Part 7 —— 逻辑验证与 testbench 编写）"
+title: "Josh's Note — Verilog<br>Part 7 逻辑验证与 testbench 编写"
 mathjax: false
 comments: true
 copyright: true

source/_posts/2023-04-18-josh-oap-part-1-1.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 1.1 —— 频率-波数响应和波束方向图）'
+title: "Josh's Note — 最优阵列处理<br>Part 1.1 频率-波数响应和波束方向图"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-20-josh-oap-part-1-2.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 1.2 —— 均匀线阵模型）'
+title: "Josh's Note — 最优阵列处理<br>Part 1.2 均匀线阵模型"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-20-josh-oap-part-1-3.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 1.3 —— 均匀加权线阵）'
+title: "Josh's Note — 最优阵列处理<br>Part 1.3 均匀加权线阵"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-22-josh-oap-part-1-4.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 1.4 —— 阵列调向）'
+title: "Josh's Note — 最优阵列处理<br>Part 1.4 阵列调向"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-04-24-josh-oap-part-1-5.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 1.5 —— 阵列性能度量指标）'
+title: "Josh's Note — 最优阵列处理<br>Part 1.5 阵列性能度量指标"
 mathjax: true
 comments: true
 copyright: true

source/_posts/2023-06-19-josh-oap-part-2-1.md

@@ -1,5 +1,5 @@
 ---
-title: 'Josh''s Notes: 最优阵列处理（Part 2.1 —— 谱加权）'
+title: "Josh's Note — 最优阵列处理<br>Part 2.1 谱加权"
 mathjax: true
 comments: true
 copyright: true