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# Vivado Git Repository
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Since the day I was admitted to my lab, the vivado project management has always been a pain in the ass for me and my lab fellows. And I didn't realize how vital revision control is to a software/hardware developer until the day I accidentally overwrote the initial version of one of my modules and it's gone ever since. So after couple of days learning vivado revision control tricks, this repository came out.
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This repository includes all the design sources and third-party reference used in my vivado project.
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The target of this repository is to stores vivado-related project and verilog/vhdl files, and maybe associated MATLAB files, or even related documentations explaining how the modules work and things needed to be taken care of when interfacing with the modules.
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## Table of Contents
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- [Vivado Git Repository](#vivado-git-repository)
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- [Table of Contents](#table-of-contents)
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- [Background](#background)
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- [How this repository is constructed?](#how-this-repository-is-constructed)
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- [Top Level](#top-level)
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- [Basic Project Structure](#basic-project-structure)
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## Background
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Since the day I joined my lab, managing Vivado projects has always been a challenge for me and my colleagues. It was not until I accidentally overwrote the initial version of one of my modules that I realized how crucial revision control is for software/hardware developers. After spending a couple of days learning Vivado revision control tricks, I created this repository.
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## How this repository is constructed?
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This repository include all the design sources and third-party reference used in my vivado project.
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This repository is designed to store Vivado-related project files and Verilog/VHDL files primarily, but it can also hold associated MATLAB files and related documentation explaining how the modules work and things that need to be taken care of when interfacing with the modules.
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| Directory Name | Description | Synthesis Required | Implementation Required | Bitstream Required |
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| :------------: | :--------------------------------------------------------------- | :--: | :--: | :--: |
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| adi_library | ADI no-OS IP Library, build with Xilinx Vivado 2019.1. | N/A | N/A | N/A |
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| common | Common Verilog/VHDL modules that can work solely without other IPs. | Yes | No | No |
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| modules | Verilog/VHDL modules that work with other IPs, thus the modules are FPGA-specific and they are managed in project mode. In the future the modules may also be categorised by different Vivado versions. | Yes | No | No |
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| projects | Project or board specific vivado projects, that can be run on hardware. | Yes | Yes | Yes |
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| template | Project initialization template. | N/A | N/A | N/A |
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### Top Level
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The structure of the top level structure is shown in the table below.
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| Name | Description | Synthesis Required | Implementation Required | Bitstream Required |
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| :--------------------: | :------------------------------------------------- | :--: | :--: | :--: |
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| adi_library | ADI no-OS IP Library, built with Xilinx Vivado 2019.1. | N/A | N/A | N/A |
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| common | Common Verilog/VHDL modules that can work solely without other IPs. | Yes | No | No |
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| custom_ips (empty yet) | Custom IPs. | Yes | No | No |
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| modules | Verilog/VHDL modules that work with other IPs, thus the modules are FPGA-specific and they are managed in project mode. In the future the modules may also be categorised by different Vivado versions. | Yes | No | No |
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| projects | Project or board specific vivado projects, that can be run on hardware. | Yes | Yes | Yes |
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| template | Project initialization template. | N/A | N/A | N/A |
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| .gitignore | gitignore file that tells git which files to ignore. | N/A | N/A | N/A |
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| README.md | This readme. | N/A | N/A | N/A |
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### Basic Project Structure
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As listed above, modules and projects are managed in project mode, in which Vivado automatically manages the source files, constraints, IPs, run results, and so on. However, the directory structures are not friendly to revision control systems because they contain many redundant files that do not require revision control, such as synthesis and implementation results, simulation intermediate files.
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Fortunately, Vivado designers have already considered almost everything related to revision control. According to the *Vivado Design Suite User Guide: Design Flows Overview* ([UG892](https://docs.xilinx.com/v/u/2019.1-English/ug892-vivado-design-flows-overview)), the only thing we need to do is store our design sources outside of the Vivado project directory.
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The basic project structure is based on [UG892](https://docs.xilinx.com/v/u/2019.1-English/ug892-vivado-design-flows-overview) and several Vivado quick take videos.
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1. [*Using Vivado Design Suite with Revision Control*](https://www.xilinx.com/video/hardware/vivado-design-suite-revision-control.html): explains basic concepts of Vivado revision control.
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2. [*Configuring and Managing Reusable IP in Vivado*](https://www.xilinx.com/video/hardware/configuring-managing-reusable-ip-vivado.html): include how to use Vivado Manage IP project.
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3. [*IP Revision Control*](https://www.xilinx.com/video/hardware/ip-revision-control.html): mainly focus on the new feature of Vivado 2021.1 that makes revision control easier.
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The structure is provided in the following table. It should be noted that anything listed below, except for the project directory, will be under revision control. For more details, one can refer to the .gitignore file.
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| Name | Description |
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| :---------: | :---------- |
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| constraints | All XDC constraint files and Tcl commands used as constraints. |
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| docs | Any design related docs, specs, reports, etc. |
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| ip | The IP source files and output products. |
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| ipi-bds | The IP Integrator block design source file (.bd), along with IP subdirectory including IP source files and output products. |
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| project | The Vivado projects. Each subdirectory contains a single Vivado project. Note that even if there is only one project, it should be included in a subdirectory so that the .gitignore file can correctly identify unwanted files. |
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| rtl | All RTL-based source files including .include files. |
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| scripts | Run scripts used to compile the design including any pre and post scripts used when launching runs, along with any other custom scripts. |
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| testbenches | Simulation test benches and stimulus files. |
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# ---------------------------- Vivado & SDK common -----------------------------
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# ignore the vivado project
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project/*/*
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# folders (and all of their contents) that should always be ignored,
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# anywhere in the repo
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.Xil/
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# file patterns that should always be ignored (journal files, log
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# files, dump files that are created upon Vivado/SDK errors)
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*.jou
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*.log
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*.backup.jou
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*.backup.log
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*.upgrade_log
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*.dmp
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vivado_pid*
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*~
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# ------------------------------ Vivado Specific -------------------------------
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# preserve hardware manager projects and sources
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!project/*/*.hw/
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# preserve design run results
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!project/*/*.runs/
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project/*/*.runs/*
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!project/*/*.runs/impl_*/
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project/*/*.runs/impl_*/*
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!project/*/*.runs/impl_*/*.bit
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!project/*/*.runs/impl_*/*.ltx
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# -------------------------------- SDK Specific --------------------------------
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!project/*/*.sdk/
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# exclude some obscure hidden SDK folders
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project/*/*.sdk/.metadata/
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project/*/*.sdk/.sdk/
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project/*/*.sdk/RemoteSystemsTempFiles/
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project/*/*.sdk/webtalk/
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# hw_platform : exclude the entire hw_platform folder, as everything can be
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# generated from the .hdf file. Make sure to include the bitstream in the .hdf
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# file when exporting from Vivado!
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project/*/*.sdk/*_hw_platform_*/
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# BSP: only keep `.cproject`, `.project`, `.sdkproject`, `.system.mss` and
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# Makefile, the ps7_cortexa9_0 lib files are regenerated automatically
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project/*/*.sdk/*_bsp/*
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!project/*/*.sdk/*_bsp/*.cproject
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!project/*/*.sdk/*_bsp/*.project
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!project/*/*.sdk/*_bsp/*.sdkproject
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!project/*/*.sdk/*_bsp/system.mss
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!project/*/*.sdk/*_bsp/Makefile
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# Application: ignored file patterns, exclude Debug & Release folders
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project/*/*.sdk/**/*.o
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project/*/*.sdk/**/*.d
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project/*/*.sdk/**/*.a
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project/*/*.sdk/*/Debug/
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project/*/*.sdk/*/Release/
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# REF: https://support.xilinx.com/s/question/0D52E00006iHpHzSAK/which-files-and-folders-of-an-sdk-project-should-be-checked-into-git-and-which-ones-should-be-ignored?language=en_US
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