fix dl814_k7_cal_coarse.tcl, former cannot use

This commit is contained in:
2023-03-21 20:49:47 +08:00
parent 0832a08d3d
commit 59ab22f92c
5 changed files with 129 additions and 166 deletions
@@ -5,8 +5,8 @@ version:1
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636f6d6d616e6473696e7075745f747970655f74636c5f636f6d6d616e645f68657265:31:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636f7265747265657461626c6570616e656c5f636f72655f747265655f7461626c65:37:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e6d656e755f72657365745f616e645f67656e65726174655f6f75747075745f70726f6475637473:31:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e7472656570616e656c5f6578705f72756e5f747265655f7461626c65:3132:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:3834:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e7472656570616e656c5f6578705f72756e5f747265655f7461626c65:3135:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:3836:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6d616e6167655f6970:33:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6f70656e5f70726f6a656374:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f73746172745f7573696e675f76697661646f5f776974685f69705f636174616c6f67:31:00:00
@@ -16,8 +16,8 @@ version:1
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f66696c65:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f7265706f727473:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f746f6f6c73:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f77696e646f77:38:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e77696e6d656e756d67725f6c61796f7574:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f77696e646f77:3132:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e77696e6d656e756d67725f6c61796f7574:34:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d73677472656570616e656c5f6d6573736167655f766965775f74726565:3131:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f696e666f726d6174696f6e5f6d65737361676573:31:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d7367766965775f7761726e696e675f6d65737361676573:31:00:00
@@ -26,7 +26,7 @@ version:1
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f66696c657365745f77696e646f77:31:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f67656e65726174655f636f6d706f736974655f66696c65:33:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f6f70656e5f69705f6c6f636174696f6e:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f70726f706572746965735f77696e646f77:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f70726f706572746965735f77696e646f77:33:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f72657365745f636f6d706f736974655f66696c65:32:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:70726f67726573736469616c6f675f6261636b67726f756e64:34:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:726469636f6d6d616e64735f64656c657465:31:00:00
@@ -35,6 +35,6 @@ version:1
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73696d706c656f757470757470726f647563746469616c6f675f67656e65726174655f6f75747075745f70726f64756374735f696d6d6564696174656c79:37:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73696d706c656f757470757470726f647563746469616c6f675f72657365745f6f75747075745f70726f6475637473:33:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73726363686f6f73657270616e656c5f6164645f636f6e666967757261626c655f69705f66696c6573:34:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636167657474696e6773746172746564766965775f726563656e745f69705f6c6f636174696f6e73:35:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636167657474696e6773746172746564766965775f726563656e745f69705f6c6f636174696f6e73:36:00:00
70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7870675f636f6566696c65776964676465745f62726f777365:32:00:00
eof:3577767703
eof:45920059
@@ -5,8 +5,8 @@ version:1
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6d616e616765636f6d706f7369746574617267657473:35:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657769706c6f636174696f6e68616e646c6572:31:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e69706c6f636174696f6e68616e646c6572:32:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726576696f7573697068616e646c6572:35:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726576696f7573697068616e646c6572:36:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726f6a656374:32:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7265637573746f6d697a65636f7265:3132:00:00
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73686f7776696577:33:00:00
eof:2350087365
70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73686f7776696577:34:00:00
eof:4044038125
@@ -1,3 +1,3 @@
version:1
6d6f64655f636f756e7465727c4755494d6f6465:8
6d6f64655f636f756e7465727c4755494d6f6465:9
eof:
@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pa" timeStamp="Tue Mar 21 20:19:01 2023">
<application name="pa" timeStamp="Tue Mar 21 20:45:55 2023">
<section name="Project Information" visible="false">
<property name="ProjectID" value="dd2c041edc1245f6938f6800e430db6c" type="ProjectID"/>
<property name="ProjectIteration" value="1" type="ProjectIteration"/>
@@ -23,10 +23,10 @@ This means code written to parse this file will need to be revisited each subseq
<property name="ManageCompositeTargets" value="5" type="JavaHandler"/>
<property name="NewIPLocationHandler" value="1" type="JavaHandler"/>
<property name="OpenIPLocationHandler" value="2" type="JavaHandler"/>
<property name="OpenPreviousIPHandler" value="5" type="JavaHandler"/>
<property name="OpenPreviousIPHandler" value="6" type="JavaHandler"/>
<property name="OpenProject" value="2" type="JavaHandler"/>
<property name="RecustomizeCore" value="12" type="JavaHandler"/>
<property name="ShowView" value="3" type="JavaHandler"/>
<property name="ShowView" value="4" type="JavaHandler"/>
</item>
<item name="Gui Handlers">
<property name="BaseDialog_CANCEL" value="7" type="GuiHandlerData"/>
@@ -35,8 +35,8 @@ This means code written to parse this file will need to be revisited each subseq
<property name="CommandsInput_TYPE_TCL_COMMAND_HERE" value="1" type="GuiHandlerData"/>
<property name="CoreTreeTablePanel_CORE_TREE_TABLE" value="7" type="GuiHandlerData"/>
<property name="ExpRunMenu_RESET_AND_GENERATE_OUTPUT_PRODUCTS" value="1" type="GuiHandlerData"/>
<property name="ExpRunTreePanel_EXP_RUN_TREE_TABLE" value="12" type="GuiHandlerData"/>
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="84" type="GuiHandlerData"/>
<property name="ExpRunTreePanel_EXP_RUN_TREE_TABLE" value="15" type="GuiHandlerData"/>
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="86" type="GuiHandlerData"/>
<property name="GettingStartedView_MANAGE_IP" value="3" type="GuiHandlerData"/>
<property name="GettingStartedView_OPEN_PROJECT" value="2" type="GuiHandlerData"/>
<property name="GettingStartedView_START_USING_VIVADO_WITH_IP_CATALOG" value="1" type="GuiHandlerData"/>
@@ -46,8 +46,8 @@ This means code written to parse this file will need to be revisited each subseq
<property name="MainMenuMgr_FILE" value="2" type="GuiHandlerData"/>
<property name="MainMenuMgr_REPORTS" value="2" type="GuiHandlerData"/>
<property name="MainMenuMgr_TOOLS" value="2" type="GuiHandlerData"/>
<property name="MainMenuMgr_WINDOW" value="8" type="GuiHandlerData"/>
<property name="MainWinMenuMgr_LAYOUT" value="2" type="GuiHandlerData"/>
<property name="MainMenuMgr_WINDOW" value="12" type="GuiHandlerData"/>
<property name="MainWinMenuMgr_LAYOUT" value="4" type="GuiHandlerData"/>
<property name="MsgTreePanel_MESSAGE_VIEW_TREE" value="11" type="GuiHandlerData"/>
<property name="MsgView_INFORMATION_MESSAGES" value="1" type="GuiHandlerData"/>
<property name="MsgView_WARNING_MESSAGES" value="1" type="GuiHandlerData"/>
@@ -56,7 +56,7 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PACommandNames_FILESET_WINDOW" value="1" type="GuiHandlerData"/>
<property name="PACommandNames_GENERATE_COMPOSITE_FILE" value="3" type="GuiHandlerData"/>
<property name="PACommandNames_OPEN_IP_LOCATION" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_PROPERTIES_WINDOW" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_PROPERTIES_WINDOW" value="3" type="GuiHandlerData"/>
<property name="PACommandNames_RESET_COMPOSITE_FILE" value="2" type="GuiHandlerData"/>
<property name="ProgressDialog_BACKGROUND" value="4" type="GuiHandlerData"/>
<property name="RDICommands_DELETE" value="1" type="GuiHandlerData"/>
@@ -65,13 +65,13 @@ This means code written to parse this file will need to be revisited each subseq
<property name="SimpleOutputProductDialog_GENERATE_OUTPUT_PRODUCTS_IMMEDIATELY" value="7" type="GuiHandlerData"/>
<property name="SimpleOutputProductDialog_RESET_OUTPUT_PRODUCTS" value="3" type="GuiHandlerData"/>
<property name="SrcChooserPanel_ADD_CONFIGURABLE_IP_FILES" value="4" type="GuiHandlerData"/>
<property name="SyntheticaGettingStartedView_RECENT_IP_LOCATIONS" value="5" type="GuiHandlerData"/>
<property name="SyntheticaGettingStartedView_RECENT_IP_LOCATIONS" value="6" type="GuiHandlerData"/>
<property name="XPG_CoeFileWidgdet_BROWSE" value="2" type="GuiHandlerData"/>
</item>
<item name="Other">
<property name="GuiMode" value="85" type="GuiMode"/>
<property name="GuiMode" value="86" type="GuiMode"/>
<property name="BatchMode" value="0" type="BatchMode"/>
<property name="TclMode" value="59" type="TclMode"/>
<property name="TclMode" value="60" type="TclMode"/>
</item>
</section>
</application>
@@ -3,7 +3,7 @@
#
# dl814_k7_cal_coarse.tcl: Tcl script for re-creating project 'dl814_k7_cal_coarse'
#
# Generated by Vivado on Tue Mar 21 20:18:34 +0800 2023
# Generated by Vivado on Tue Mar 21 20:47:28 +0800 2023
# IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
#
# This file contains the Vivado Tcl commands for re-creating the project to the state*
@@ -27,91 +27,91 @@
#
# 3. The following remote source files that were added to the original project:-
#
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx/ila_rx.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_tx/ila_tx.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_rd/vio_ant_rd.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rf_rd/vio_rf_rd.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_test/vio_ant_test.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rfcontrl/vio_rfcontrl.xci"
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/COSLUT_10_16bit/COSLUT_10_16bit.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/GaussFir_12m/GaussFir_12m.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/data_1p5m/data_1p5m.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/GaussFir_1mp5/GaussFir_1mp5.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/system_bd.bd"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ad9361_clk_gen/ad9361_clk_gen.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ADF4351_2.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/AddrtoWaveform.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/FRAC1.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/GMSK_send.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/INT_ROMb.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_1.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_2.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_3.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_4.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/Sisyif.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/T_CAL.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_coarse.v"
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"
# "D:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_a.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_b.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/ant_rf_ctrl.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_a.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_b.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/clk_dist.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ds18b20_temp.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/frac2_rom.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/fre_caliatt.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mgc_ctrl.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mod2_rom.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_master.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_salve.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_tx.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/tx_control.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/tx_pre_process.v"
# "D:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/system_top.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_cal/vio_cal.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx_pre/ila_rx_pre.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_cal/ila_cal.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/atan2_16b/atan2_16b.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/rotate_16b/rotate_16b.xci"
# "D:/vivado-git/common/ApproxModuli_26bit.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accor_mat_formatting.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accum_cmplx_mat.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/acorr_cmplx_col_vec.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_fine.v"
# "D:/vivado-git/common/adder_tree_ppl.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/rx_pre_process.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/spatial_filter.v"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/weight_vec_formatting.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_manual_ctrl/vio_manual_ctrl.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx/ila_rx.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_tx/ila_tx.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_rd/vio_ant_rd.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rf_rd/vio_rf_rd.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_AntCtrl/ila_AntCtrl.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rfcontrl/ila_rfcontrl.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_ant_test/vio_ant_test.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_rfcontrl/vio_rfcontrl.xci"
# "d:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/cmpy_18x8/cmpy_18x8.xci"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/dds_32b_8b/dds_32b_8b.xci"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hop_rom/hop_rom.xci"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/hrc_64_12_025/hrc_64_12_025.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/COSLUT_10_16bit/COSLUT_10_16bit.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/GaussFir_12m/GaussFir_12m.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/data_1p5m/data_1p5m.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/GaussFir_1mp5/GaussFir_1mp5.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_rf_interface/fifo_AntCtrl/fifo_AntCtrl.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/system_bd.bd"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg2/ant_clk_gen_stg2.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ant_clk_gen_stg1/ant_clk_gen_stg1.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ad9361_clk_gen/ad9361_clk_gen.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ADF4351_2.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/AddrtoWaveform.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/FRAC1.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/GMSK_send.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/INT_ROMb.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_1.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_2.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_3.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/R_CAL_4.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/Sisyif.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/T_CAL.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_coarse.v"
# "d:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_rx_map_cmos_dual.v"
# "d:/vivado-git/modules/xc7k410tffg900-2/ad9361_mapping/rtl/ad9361_tx_map_cmos_dual.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_a.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/adf4371_b.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/ant_rf_ctrl.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_a.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/band_rom_b.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/clk_dist.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/ds18b20_temp.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/frac2_rom.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/fre_caliatt.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mgc_ctrl.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/mod2_rom.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_master.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_salve.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/Sisyif_src/spi_tx.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ipi-bds/system_bd/hdl/system_bd_wrapper.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/transmitter/tx_control.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/tx_pre_process.v"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/rtl/tx_qpsk.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/system_top.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_cal/vio_cal.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rx_pre/ila_rx_pre.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_cal/ila_cal.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/vio_clk_ld_rd/vio_clk_ld_rd.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_16x12/cmpy_16x12.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/ram_hop_data/ram_hop_data.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_weight_cdc/fifo_weight_cdc.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/fifo_accor_cdc/fifo_accor_cdc.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/add_s24_s32_s32/add_s24_s32_s32.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/cmpy_12x12/cmpy_12x12.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/atan2_16b/atan2_16b.xci"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/rx_pre_process/rotate_16b/rotate_16b.xci"
# "d:/vivado-git/common/ApproxModuli_26bit.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accor_mat_formatting.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/accum_cmplx_mat.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/acorr_cmplx_col_vec.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/ad9361_phase_cal_fine.v"
# "d:/vivado-git/common/adder_tree_ppl.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/rx_pre_process.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/spatial_filter.v"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/rtl/rx_pre_process/weight_vec_formatting.v"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/sweep_freq.coe"
# "d:/vivado-git/modules/xc7k410tffg900-2/tx_qpsk/ip/coe/hrc_64_12_025.coe"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/coe/cos_8192_18bit.coe"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/coe/GaussFir_12m.coe"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/coe/data_1m5.coe"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/transmitter/coe/Gaussfir_1p5m.coe"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_rfcontrl/ila_rfcontrl.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/ip/ila_AntCtrl/ila_AntCtrl.xci"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7401t_ad9516_2ad9361_physical.xdc"
# "D:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7410t_ad9516_2ad9361_timing.xdc"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7401t_ad9516_2ad9361_physical.xdc"
# "d:/vivado-git/projects/datalink_814/dl814_k7_cal_coarse/constraints/k7410t_ad9516_2ad9361_timing.xdc"
#
#*****************************************************************************************
@@ -216,14 +216,13 @@ set_property -name "part" -value "xc7k410tffg900-2" -objects $obj
set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj
set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj
set_property -name "simulator_language" -value "Mixed" -objects $obj
set_property -name "webtalk.activehdl_export_sim" -value "43" -objects $obj
set_property -name "webtalk.ies_export_sim" -value "43" -objects $obj
set_property -name "webtalk.modelsim_export_sim" -value "43" -objects $obj
set_property -name "webtalk.questa_export_sim" -value "43" -objects $obj
set_property -name "webtalk.riviera_export_sim" -value "43" -objects $obj
set_property -name "webtalk.vcs_export_sim" -value "43" -objects $obj
set_property -name "webtalk.xcelium_export_sim" -value "4" -objects $obj
set_property -name "webtalk.xsim_export_sim" -value "43" -objects $obj
set_property -name "webtalk.activehdl_export_sim" -value "45" -objects $obj
set_property -name "webtalk.ies_export_sim" -value "45" -objects $obj
set_property -name "webtalk.modelsim_export_sim" -value "45" -objects $obj
set_property -name "webtalk.questa_export_sim" -value "45" -objects $obj
set_property -name "webtalk.riviera_export_sim" -value "45" -objects $obj
set_property -name "webtalk.vcs_export_sim" -value "45" -objects $obj
set_property -name "webtalk.xsim_export_sim" -value "45" -objects $obj
set_property -name "xpm_libraries" -value "XPM_CDC XPM_MEMORY" -objects $obj
# Create 'sources_1' fileset (if not found)
@@ -246,6 +245,8 @@ set files [list \
[file normalize "${origin_dir}/../ip/ila_tx/ila_tx.xci"] \
[file normalize "${origin_dir}/../ip/vio_ant_rd/vio_ant_rd.xci"] \
[file normalize "${origin_dir}/../ip/vio_rf_rd/vio_rf_rd.xci"] \
[file normalize "${origin_dir}/../ip/ila_AntCtrl/ila_AntCtrl.xci"] \
[file normalize "${origin_dir}/../ip/ila_rfcontrl/ila_rfcontrl.xci"] \
[file normalize "${origin_dir}/../ip/vio_ant_test/vio_ant_test.xci"] \
[file normalize "${origin_dir}/../ip/vio_rfcontrl/vio_rfcontrl.xci"] \
[file normalize "${origin_dir}/../../../../modules/xc7k410tffg900-2/ad9361_mapping/ip/ad9361_fifo/ad9361_fifo.xci"] \
@@ -371,6 +372,24 @@ if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/ila_AntCtrl/ila_AntCtrl.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/ila_rfcontrl/ila_rfcontrl.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
set file "$origin_dir/../ip/vio_ant_test/vio_ant_test.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
@@ -628,62 +647,6 @@ set obj [get_filesets sources_1]
set_property -name "top" -value "system_top" -objects $obj
set_property -name "top_auto_set" -value "0" -objects $obj
# Set IP repository paths
set obj [get_filesets ila_rfcontrl]
set_property "ip_repo_paths" "[file normalize "$origin_dir/../../../../adi_library"]" $obj
# Rebuild user ip_repo's index before adding any source files
update_ip_catalog -rebuild
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
[file normalize "${origin_dir}/../ip/ila_rfcontrl/ila_rfcontrl.xci"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../ip/ila_rfcontrl/ila_rfcontrl.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
# Set 'sources_1' fileset file properties for local files
# None
# Set IP repository paths
set obj [get_filesets ila_AntCtrl]
set_property "ip_repo_paths" "[file normalize "$origin_dir/../../../../adi_library"]" $obj
# Rebuild user ip_repo's index before adding any source files
update_ip_catalog -rebuild
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
[file normalize "${origin_dir}/../ip/ila_AntCtrl/ila_AntCtrl.xci"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../ip/ila_AntCtrl/ila_AntCtrl.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
set_property -name "registered_with_manager" -value "1" -objects $file_obj
if { ![get_property "is_locked" $file_obj] } {
set_property -name "synth_checkpoint_mode" -value "Singular" -objects $file_obj
}
# Set 'sources_1' fileset file properties for local files
# None
# Create 'constrs_1' fileset (if not found)
if {[string equal [get_filesets -quiet constrs_1] ""]} {
create_fileset -constrset constrs_1