Archived
5406 lines
242 KiB
XML
5406 lines
242 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:vendor>analog.com</spirit:vendor>
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<spirit:library>user</spirit:library>
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<spirit:name>axi_dmac</spirit:name>
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<spirit:version>1.0</spirit:version>
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<spirit:busInterfaces>
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<spirit:busInterface>
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<spirit:name>s_axi</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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<spirit:slave>
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<spirit:memoryMapRef spirit:memoryMapRef="s_axi"/>
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</spirit:slave>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awaddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_awready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WSTRB</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wstrb</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_wready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_bready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_araddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_arready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_rready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aclk</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>CLK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aclk</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_BUSIF</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_BUSIF">s_axi</spirit:value>
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</spirit:parameter>
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<spirit:parameter>
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<spirit:name>ASSOCIATED_RESET</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>s_axi_aresetn</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
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<spirit:slave/>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>RST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>s_axi_aresetn</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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</spirit:portMaps>
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<spirit:parameters>
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<spirit:parameter>
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<spirit:name>POLARITY</spirit:name>
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<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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</spirit:busInterface>
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<spirit:busInterface>
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<spirit:name>m_dest_axi</spirit:name>
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<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
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<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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<spirit:master>
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<spirit:addressSpaceRef spirit:addressSpaceRef="m_dest_axi"/>
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</spirit:master>
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<spirit:portMaps>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWADDR</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awaddr</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWLEN</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awlen</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWSIZE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awsize</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWBURST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awburst</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWLOCK</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awlock</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWCACHE</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awcache</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWPROT</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awprot</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>AWREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_awready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WDATA</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wdata</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WSTRB</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wstrb</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WLAST</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wlast</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>WREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_wready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_bid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BRESP</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_bresp</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BVALID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_bvalid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>BREADY</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_bready</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
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<spirit:name>ARID</spirit:name>
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</spirit:logicalPort>
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<spirit:physicalPort>
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<spirit:name>m_dest_axi_arid</spirit:name>
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</spirit:physicalPort>
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</spirit:portMap>
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<spirit:portMap>
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<spirit:logicalPort>
|
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<spirit:name>ARADDR</spirit:name>
|
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</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
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<spirit:name>m_dest_axi_araddr</spirit:name>
|
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</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARLEN</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
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<spirit:name>m_dest_axi_arlen</spirit:name>
|
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</spirit:physicalPort>
|
|
</spirit:portMap>
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|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARSIZE</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arsize</spirit:name>
|
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</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARBURST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arburst</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARLOCK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arlock</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
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<spirit:name>ARCACHE</spirit:name>
|
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</spirit:logicalPort>
|
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<spirit:physicalPort>
|
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<spirit:name>m_dest_axi_arcache</spirit:name>
|
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</spirit:physicalPort>
|
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</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARPROT</spirit:name>
|
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</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arprot</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_arready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RDATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rdata</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RRESP</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rresp</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RLAST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rlast</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_rready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_DEST_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.m_dest_axi" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_DEST')) = 0)">true</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_src_axi</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
|
|
<spirit:master>
|
|
<spirit:addressSpaceRef spirit:addressSpaceRef="m_src_axi"/>
|
|
</spirit:master>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWADDR</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awaddr</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWLEN</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awlen</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWSIZE</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awsize</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWBURST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awburst</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWLOCK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awlock</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWCACHE</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awcache</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWPROT</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awprot</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>AWREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_awready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WDATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wdata</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WSTRB</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wstrb</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WLAST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wlast</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>WREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_wready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>BID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_bid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>BRESP</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_bresp</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>BVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_bvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>BREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_bready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARADDR</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_araddr</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARLEN</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arlen</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARSIZE</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arsize</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARBURST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arburst</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARLOCK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arlock</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARCACHE</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arcache</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARPROT</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arprot</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>ARREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_arready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RDATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rdata</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RRESP</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rresp</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RLAST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rlast</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rvalid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_rready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_SRC_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.m_src_axi" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_SRC')) = 0)">false</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_rd_clk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_clk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_wr_clk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_clk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_axis_aclk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_dest_axi_aclk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_DEST_AXI_ACLK.ASSOCIATED_BUSIF">m_dest_axi</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_RESET</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_DEST_AXI_ACLK.ASSOCIATED_RESET">m_dest_axi_aresetn</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_src_axi_aclk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_SRC_AXI_ACLK.ASSOCIATED_BUSIF">m_src_axi</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_RESET</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_SRC_AXI_ACLK.ASSOCIATED_RESET">m_src_axi_aresetn</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>s_axis_aclk</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_dest_axi_aresetn</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_dest_axi_aresetn</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>POLARITY</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_DEST_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_src_axi_aresetn</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>RST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_src_axi_aresetn</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>POLARITY</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_SRC_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>s_axis</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_ready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_valid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TDATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_data</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TSTRB</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_strb</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TKEEP</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_keep</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TUSER</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_user</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_id</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TDEST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_dest</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TLAST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_last</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.s_axis" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_SRC')) = 1)">false</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>s_axis_signal_clock</spirit:name>
|
|
<spirit:displayName>s_axis_signal_clock</spirit:displayName>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>s_axis_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXIS_SIGNAL_CLOCK.ASSOCIATED_BUSIF">s_axis</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_axis</spirit:name>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
|
|
<spirit:master/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TREADY</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_ready</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TVALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_valid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TDATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_data</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TSTRB</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_strb</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TKEEP</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_keep</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TUSER</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_user</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_id</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TDEST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_dest</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>TLAST</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_last</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.m_axis" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_DEST')) = 1)">false</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>m_axis_signal_clock</spirit:name>
|
|
<spirit:displayName>m_axis_signal_clock</spirit:displayName>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>m_axis_aclk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXIS_SIGNAL_CLOCK.ASSOCIATED_BUSIF">m_axis</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_wr</spirit:name>
|
|
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_wr" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_wr_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>EN</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_en</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>DATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_din</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>OVERFLOW</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_overflow</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>SYNC</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_sync</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>XFER_REQ</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_xfer_req</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.fifo_wr" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_SRC')) = 2)">true</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_wr_signal_clock</spirit:name>
|
|
<spirit:displayName>fifo_wr_signal_clock</spirit:displayName>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_wr_clk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
|
<spirit:value spirit:id="BUSIFPARAM_VALUE.FIFO_WR_SIGNAL_CLOCK.ASSOCIATED_BUSIF">fifo_wr</spirit:value>
|
|
</spirit:parameter>
|
|
</spirit:parameters>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_rd</spirit:name>
|
|
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_rd" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_rd_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>EN</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_en</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>DATA</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_dout</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>VALID</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_valid</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>UNDERFLOW</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_underflow</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:busInterfaceInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.fifo_rd" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_DEST')) = 2)">false</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:busInterfaceInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:busInterface>
|
|
<spirit:busInterface>
|
|
<spirit:name>fifo_rd_signal_clock</spirit:name>
|
|
<spirit:displayName>fifo_rd_signal_clock</spirit:displayName>
|
|
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
|
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
|
<spirit:slave/>
|
|
<spirit:portMaps>
|
|
<spirit:portMap>
|
|
<spirit:logicalPort>
|
|
<spirit:name>CLK</spirit:name>
|
|
</spirit:logicalPort>
|
|
<spirit:physicalPort>
|
|
<spirit:name>fifo_rd_clk</spirit:name>
|
|
</spirit:physicalPort>
|
|
</spirit:portMap>
|
|
</spirit:portMaps>
|
|
<spirit:parameters>
|
|
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</xilinx:portInfo>
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<spirit:name>fifo_rd_xfer_req</spirit:name>
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<spirit:wire>
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<spirit:direction>out</spirit:direction>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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</spirit:wireTypeDef>
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<spirit:driver>
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<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
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</spirit:driver>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.fifo_rd_xfer_req" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.DMA_TYPE_DEST')) = 2)">false</xilinx:isEnabled>
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</xilinx:enablement>
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</spirit:vendorExtensions>
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<spirit:port>
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<spirit:name>dest_diag_level_bursts</spirit:name>
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<spirit:wire>
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<spirit:direction>out</spirit:direction>
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<spirit:left spirit:format="long">7</spirit:left>
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<spirit:right spirit:format="long">0</spirit:right>
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<spirit:wireTypeDef>
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<spirit:typeName>std_logic_vector</spirit:typeName>
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<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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</spirit:wireTypeDef>
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<xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.dest_diag_level_bursts" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.ENABLE_DIAGNOSTICS_IF')) = 1)">false</xilinx:isEnabled>
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</xilinx:enablement>
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<spirit:name>ID</spirit:name>
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<spirit:displayName>Id</spirit:displayName>
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<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ID">0</spirit:value>
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</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_DATA_WIDTH_SRC</spirit:name>
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|
<spirit:displayName>Dma Data Width Src</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_DATA_WIDTH_SRC">64</spirit:value>
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</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>DMA_DATA_WIDTH_DEST</spirit:name>
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<spirit:displayName>Dma Data Width Dest</spirit:displayName>
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<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_DATA_WIDTH_DEST">64</spirit:value>
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</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>DMA_LENGTH_WIDTH</spirit:name>
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|
<spirit:displayName>Dma Length Width</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_LENGTH_WIDTH">24</spirit:value>
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|
</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_2D_TRANSFER</spirit:name>
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|
<spirit:displayName>Dma 2d Transfer</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_2D_TRANSFER">false</spirit:value>
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</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>ASYNC_CLK_REQ_SRC</spirit:name>
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|
<spirit:displayName>Async Clk Req Src</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ASYNC_CLK_REQ_SRC">true</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>ASYNC_CLK_SRC_DEST</spirit:name>
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|
<spirit:displayName>Async Clk Src Dest</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ASYNC_CLK_SRC_DEST">true</spirit:value>
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|
</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>ASYNC_CLK_DEST_REQ</spirit:name>
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|
<spirit:displayName>Async Clk Dest Req</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ASYNC_CLK_DEST_REQ">true</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>AXI_SLICE_DEST</spirit:name>
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|
<spirit:displayName>Axi Slice Dest</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_SLICE_DEST">false</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>AXI_SLICE_SRC</spirit:name>
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|
<spirit:displayName>Axi Slice Src</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_SLICE_SRC">false</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>SYNC_TRANSFER_START</spirit:name>
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|
<spirit:displayName>Sync Transfer Start</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.SYNC_TRANSFER_START">false</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>CYCLIC</spirit:name>
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|
<spirit:displayName>Cyclic</spirit:displayName>
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|
<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.CYCLIC">false</spirit:value>
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|
</spirit:modelParameter>
|
|
<spirit:modelParameter spirit:dataType="integer">
|
|
<spirit:name>DMA_AXI_PROTOCOL_DEST</spirit:name>
|
|
<spirit:displayName>Dma Axi Protocol Dest</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_AXI_PROTOCOL_DEST">0</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_AXI_PROTOCOL_SRC</spirit:name>
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|
<spirit:displayName>Dma Axi Protocol Src</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_AXI_PROTOCOL_SRC">0</spirit:value>
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|
<spirit:vendorExtensions>
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<xilinx:parameterInfo>
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<xilinx:enablement>
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<xilinx:isEnabled xilinx:id="MODELPARAM_ENABLEMENT.DMA_AXI_PROTOCOL_SRC">false</xilinx:isEnabled>
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|
</xilinx:enablement>
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</xilinx:parameterInfo>
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</spirit:vendorExtensions>
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</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_TYPE_DEST</spirit:name>
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|
<spirit:displayName>Dma Type Dest</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_TYPE_DEST">0</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_TYPE_SRC</spirit:name>
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|
<spirit:displayName>Dma Type Src</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_TYPE_SRC">2</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_AXI_ADDR_WIDTH</spirit:name>
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|
<spirit:displayName>Dma Axi Addr Width</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_AXI_ADDR_WIDTH">32</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>MAX_BYTES_PER_BURST</spirit:name>
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|
<spirit:displayName>Max Bytes Per Burst</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.MAX_BYTES_PER_BURST">128</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>FIFO_SIZE</spirit:name>
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|
<spirit:displayName>Fifo Size</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.FIFO_SIZE">8</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>AXI_ID_WIDTH_SRC</spirit:name>
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|
<spirit:displayName>Axi Id Width Src</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_ID_WIDTH_SRC">1</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>AXI_ID_WIDTH_DEST</spirit:name>
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|
<spirit:displayName>Axi Id Width Dest</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AXI_ID_WIDTH_DEST">1</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_AXIS_ID_W</spirit:name>
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|
<spirit:displayName>Dma Axis Id W</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_AXIS_ID_W">8</spirit:value>
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|
</spirit:modelParameter>
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|
<spirit:modelParameter spirit:dataType="integer">
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|
<spirit:name>DMA_AXIS_DEST_W</spirit:name>
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|
<spirit:displayName>Dma Axis Dest W</spirit:displayName>
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|
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DMA_AXIS_DEST_W">4</spirit:value>
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|
</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>DISABLE_DEBUG_REGISTERS</spirit:name>
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|
<spirit:displayName>Disable Debug Registers</spirit:displayName>
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<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.DISABLE_DEBUG_REGISTERS">false</spirit:value>
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|
</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>ENABLE_DIAGNOSTICS_IF</spirit:name>
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|
<spirit:displayName>Enable Diagnostics If</spirit:displayName>
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<spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ENABLE_DIAGNOSTICS_IF">false</spirit:value>
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</spirit:modelParameter>
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<spirit:modelParameter spirit:dataType="integer">
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<spirit:name>ALLOW_ASYM_MEM</spirit:name>
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|
<spirit:displayName>Allow Asym Mem</spirit:displayName>
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<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ALLOW_ASYM_MEM">0</spirit:value>
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|
</spirit:modelParameter>
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</spirit:model>
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<spirit:choice>
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<spirit:name>choice_list_259f6857</spirit:name>
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<spirit:enumeration>16</spirit:enumeration>
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<spirit:enumeration>32</spirit:enumeration>
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<spirit:enumeration>64</spirit:enumeration>
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<spirit:choice>
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<spirit:name>choice_list_74b5137e</spirit:name>
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<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
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<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
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<spirit:name>choice_list_9a3ef62d</spirit:name>
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<spirit:enumeration>2</spirit:enumeration>
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<spirit:enumeration>32</spirit:enumeration>
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<spirit:name>choice_list_9ca20931</spirit:name>
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<spirit:enumeration>LEVEL_HIGH</spirit:enumeration>
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<spirit:enumeration>LEVEL_LOW</spirit:enumeration>
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<spirit:enumeration>EDGE_RISING</spirit:enumeration>
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<spirit:enumeration>EDGE_FALLING</spirit:enumeration>
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<spirit:name>choice_pairs_1293c054</spirit:name>
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<spirit:enumeration spirit:text="Memory-Mapped AXI">0</spirit:enumeration>
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<spirit:enumeration spirit:text="Streaming AXI">1</spirit:enumeration>
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<spirit:enumeration spirit:text="FIFO Interface">2</spirit:enumeration>
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<spirit:name>choice_pairs_8bd59fa5</spirit:name>
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<spirit:enumeration spirit:text="AXI3">1</spirit:enumeration>
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<spirit:name>axi_dmac_constr.ttcl</spirit:name>
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<spirit:name>2d_transfer.v</spirit:name>
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<spirit:name>address_generator.v</spirit:name>
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<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_axis_fifo" xilinx:version="1.0">
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</spirit:vendorExtensions>
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</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagesynthesis_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0">
|
|
<xilinx:mode xilinx:name="copy_mode"/>
|
|
</xilinx:componentRef>
|
|
</xilinx:subCoreRef>
|
|
</spirit:vendorExtensions>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_pkg_sv.ttcl</spirit:name>
|
|
<spirit:userFileType>ttcl</spirit:userFileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>2d_transfer.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/ad_mem_asym.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>inc_id.vh</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
<spirit:isIncludeFile>true</spirit:isIncludeFile>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>address_generator.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_burst_memory.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_regmap.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_regmap_request.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_reset_manager.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_resize_dest.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_resize_src.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_response_manager.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac_transfer.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_register_slice.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>data_mover.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>dest_axi_mm.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>dest_axi_stream.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>dest_fifo_inf.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>request_arb.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>request_generator.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>resp.vh</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
<spirit:isIncludeFile>true</spirit:isIncludeFile>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>response_generator.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>response_handler.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>splitter.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>src_axi_mm.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>src_axi_stream.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>src_fifo_inf.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>../common/up_axi.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>bd/bd.tcl</spirit:name>
|
|
<spirit:fileType>tclSource</spirit:fileType>
|
|
</spirit:file>
|
|
<spirit:file>
|
|
<spirit:name>axi_dmac.v</spirit:name>
|
|
<spirit:fileType>verilogSource</spirit:fileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_anylanguagebehavioralsimulation_analog_com_user_util_axis_fifo_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_axis_fifo" xilinx:version="1.0">
|
|
<xilinx:mode xilinx:name="copy_mode"/>
|
|
</xilinx:componentRef>
|
|
</xilinx:subCoreRef>
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|
</spirit:vendorExtensions>
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|
</spirit:fileSet>
|
|
<spirit:fileSet>
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<spirit:name>xilinx_anylanguagebehavioralsimulation_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0">
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|
<xilinx:mode xilinx:name="copy_mode"/>
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|
</xilinx:componentRef>
|
|
</xilinx:subCoreRef>
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|
</spirit:vendorExtensions>
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|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>xgui/axi_dmac_v1_0.tcl</spirit:name>
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|
<spirit:fileType>tclSource</spirit:fileType>
|
|
<spirit:userFileType>CHECKSUM_6cc0b8b1</spirit:userFileType>
|
|
<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_xpgui_analog_com_user_util_axis_fifo_1_0__ref_view_fileset</spirit:name>
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|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_axis_fifo" xilinx:version="1.0"/>
|
|
</xilinx:subCoreRef>
|
|
</spirit:vendorExtensions>
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|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_xpgui_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0"/>
|
|
</xilinx:subCoreRef>
|
|
</spirit:vendorExtensions>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_blockdiagram_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>bd/bd.tcl</spirit:name>
|
|
<spirit:fileType>tclSource</spirit:fileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_blockdiagram_analog_com_user_util_axis_fifo_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_axis_fifo" xilinx:version="1.0"/>
|
|
</xilinx:subCoreRef>
|
|
</spirit:vendorExtensions>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_blockdiagram_analog_com_user_util_cdc_1_0__ref_view_fileset</spirit:name>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:subCoreRef>
|
|
<xilinx:componentRef xilinx:vendor="analog.com" xilinx:library="user" xilinx:name="util_cdc" xilinx:version="1.0"/>
|
|
</xilinx:subCoreRef>
|
|
</spirit:vendorExtensions>
|
|
</spirit:fileSet>
|
|
<spirit:fileSet>
|
|
<spirit:name>xilinx_utilityxitfiles_view_fileset</spirit:name>
|
|
<spirit:file>
|
|
<spirit:name>gui/axi_dmac_v1_0.gtcl</spirit:name>
|
|
<spirit:userFileType>GTCL</spirit:userFileType>
|
|
</spirit:file>
|
|
</spirit:fileSet>
|
|
</spirit:fileSets>
|
|
<spirit:description>ADI AXI DMA Controller</spirit:description>
|
|
<spirit:parameters>
|
|
<spirit:parameter>
|
|
<spirit:name>ID</spirit:name>
|
|
<spirit:displayName>Core ID</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.ID">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_DATA_WIDTH_SRC</spirit:name>
|
|
<spirit:displayName>Bus Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_DATA_WIDTH_SRC" spirit:choiceRef="choice_list_259f6857">64</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_DATA_WIDTH_DEST</spirit:name>
|
|
<spirit:displayName>Bus Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_DATA_WIDTH_DEST" spirit:choiceRef="choice_list_259f6857">64</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_LENGTH_WIDTH</spirit:name>
|
|
<spirit:displayName>DMA Transfer Length Register Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_LENGTH_WIDTH" spirit:minimum="8" spirit:maximum="32" spirit:rangeType="long">24</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_2D_TRANSFER</spirit:name>
|
|
<spirit:displayName>2D Transfer Support</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_2D_TRANSFER">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ASYNC_CLK_REQ_SRC</spirit:name>
|
|
<spirit:displayName>Request and Source Clock Asynchronous</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.ASYNC_CLK_REQ_SRC">true</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ASYNC_CLK_SRC_DEST</spirit:name>
|
|
<spirit:displayName>Source and Destination Clock Asynchronous</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.ASYNC_CLK_SRC_DEST">true</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ASYNC_CLK_DEST_REQ</spirit:name>
|
|
<spirit:displayName>Destination and Request Clock Asynchronous</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.ASYNC_CLK_DEST_REQ">true</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_SLICE_DEST</spirit:name>
|
|
<spirit:displayName>Insert Register Slice</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_SLICE_DEST">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_SLICE_SRC</spirit:name>
|
|
<spirit:displayName>Insert Register Slice</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_SLICE_SRC">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>SYNC_TRANSFER_START</spirit:name>
|
|
<spirit:displayName>Transfer Start Synchronization Support</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.SYNC_TRANSFER_START">false</spirit:value>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:parameterInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="generated" xilinx:id="PARAM_ENABLEMENT.SYNC_TRANSFER_START">true</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:parameterInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>CYCLIC</spirit:name>
|
|
<spirit:displayName>Cyclic Transfer Support</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.CYCLIC">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_AXI_PROTOCOL_DEST</spirit:name>
|
|
<spirit:displayName>AXI Protocol</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_AXI_PROTOCOL_DEST" spirit:choiceRef="choice_pairs_8bd59fa5">0</spirit:value>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:parameterInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="generated" xilinx:id="PARAM_ENABLEMENT.DMA_AXI_PROTOCOL_DEST">true</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:parameterInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_AXI_PROTOCOL_SRC</spirit:name>
|
|
<spirit:displayName>AXI Protocol</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_AXI_PROTOCOL_SRC" spirit:choiceRef="choice_pairs_8bd59fa5">0</spirit:value>
|
|
<spirit:vendorExtensions>
|
|
<xilinx:parameterInfo>
|
|
<xilinx:enablement>
|
|
<xilinx:isEnabled xilinx:resolve="generated" xilinx:id="PARAM_ENABLEMENT.DMA_AXI_PROTOCOL_SRC">false</xilinx:isEnabled>
|
|
</xilinx:enablement>
|
|
</xilinx:parameterInfo>
|
|
</spirit:vendorExtensions>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_TYPE_DEST</spirit:name>
|
|
<spirit:displayName>Type</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_TYPE_DEST" spirit:choiceRef="choice_pairs_1293c054">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_TYPE_SRC</spirit:name>
|
|
<spirit:displayName>Type</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_TYPE_SRC" spirit:choiceRef="choice_pairs_1293c054">2</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_AXI_ADDR_WIDTH</spirit:name>
|
|
<spirit:displayName>Dma Axi Addr Width</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_AXI_ADDR_WIDTH">32</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>MAX_BYTES_PER_BURST</spirit:name>
|
|
<spirit:displayName>Maximum Bytes per Burst</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.MAX_BYTES_PER_BURST">128</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>FIFO_SIZE</spirit:name>
|
|
<spirit:displayName>Store-and-Forward Memory Size (In Bursts)</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.FIFO_SIZE" spirit:choiceRef="choice_list_9a3ef62d">8</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_ID_WIDTH_SRC</spirit:name>
|
|
<spirit:displayName>Axi Id Width Src</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_ID_WIDTH_SRC">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>AXI_ID_WIDTH_DEST</spirit:name>
|
|
<spirit:displayName>Axi Id Width Dest</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_ID_WIDTH_DEST">1</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_AXIS_ID_W</spirit:name>
|
|
<spirit:displayName>Dma Axis Id W</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_AXIS_ID_W">8</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DMA_AXIS_DEST_W</spirit:name>
|
|
<spirit:displayName>Dma Axis Dest W</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_AXIS_DEST_W">4</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>DISABLE_DEBUG_REGISTERS</spirit:name>
|
|
<spirit:displayName>Disable Debug Registers</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.DISABLE_DEBUG_REGISTERS">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ENABLE_DIAGNOSTICS_IF</spirit:name>
|
|
<spirit:displayName>Enable Diagnostics Interface</spirit:displayName>
|
|
<spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.ENABLE_DIAGNOSTICS_IF">false</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>ALLOW_ASYM_MEM</spirit:name>
|
|
<spirit:displayName>Allow Asym Mem</spirit:displayName>
|
|
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.ALLOW_ASYM_MEM">0</spirit:value>
|
|
</spirit:parameter>
|
|
<spirit:parameter>
|
|
<spirit:name>Component_Name</spirit:name>
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<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">axi_dmac_v1_0</spirit:value>
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</spirit:parameter>
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</spirit:parameters>
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<spirit:vendorExtensions>
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<xilinx:coreExtensions>
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<xilinx:supportedFamilies>
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<xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qvirtexuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qzynq</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qzynquplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">qzynquplusRFSOC</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">spartan7</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexu</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplus58g</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">virtexuplusHBM</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">zynq</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">zynquplus</xilinx:family>
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<xilinx:family xilinx:lifeCycle="Production">zynquplusRFSOC</xilinx:family>
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</xilinx:supportedFamilies>
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<xilinx:taxonomies>
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<xilinx:taxonomy>/Analog_Devices</xilinx:taxonomy>
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</xilinx:taxonomies>
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<xilinx:displayName>ADI AXI DMA Controller</xilinx:displayName>
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<xilinx:definitionSource>package_project</xilinx:definitionSource>
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<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
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<xilinx:vendorURL>http://www.analog.com</xilinx:vendorURL>
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<xilinx:coreRevision>1</xilinx:coreRevision>
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<xilinx:coreCreationDateTime>2021-12-08T02:23:00Z</xilinx:coreCreationDateTime>
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</xilinx:coreExtensions>
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<xilinx:packagingInfo>
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<xilinx:xilinxVersion>2019.1.3</xilinx:xilinxVersion>
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<xilinx:checksum xilinx:scope="addressSpaces" xilinx:value="3b7f3e28"/>
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<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="f0b823b7"/>
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<xilinx:checksum xilinx:scope="ports" xilinx:value="b851c17f"/>
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<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="9d6397c8"/>
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<xilinx:checksum xilinx:scope="parameters" xilinx:value="5b3c14a1"/>
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</xilinx:packagingInfo>
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</spirit:vendorExtensions>
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