josh/vivado-202401
Archived
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

major update to lcmv, to fit hop control

Browse Source 
1. 调零算法部分增加调零控制模块,用于各模块互联和状态控制以及数据存储,增加LCMV和DAS选通; 2. Cordic 旋转输入改为保留两个符号位,避免溢出; 3. LCMV快拍数修改为2048; 4. 修改功率计算模块,适配较小数据位宽; 5. 修改在线捕获校准程序自动校准部分VIO初值; 6. 地检新射频发端增加自动频点切换
This commit is contained in:
josh
2023-07-31 10:31:21 +08:00
parent a877802bdf
commit 365a132831
418 changed files with 14603 additions and 3824 deletions
Download Patch File Download Diff File Expand all files Collapse all files
projects/dl814_dj/dl814_dj_new_48m/rtl/rf_auto_switch_freq.v
+1 -1
View File
@@ -110,7 +110,7 @@ always @ (posedge clk)
reg [11:0] local_freq_word = 12'd0;
reg local_freq_word_valid = 1'b0;
reg local_freq_word_switch = 1'b0;
wire [10:0] rom_freq_word_dout;
wire [11:0] rom_freq_word_dout;
// 2 clock latency
rom_freq_word rom_freq_word_inst(
.clka (clk ),
projects/dl814_dj/dl814_dj_new_48m/rtl/system_top.v
+62 -14
View File
@@ -107,7 +107,12 @@ module system_top
inout [53:0] fixed_io_mio ,
inout fixed_io_ps_clk ,
inout fixed_io_ps_porb ,
inout fixed_io_ps_srstb
inout fixed_io_ps_srstb ,
// *************************************************************************
// ************************* Sync Signal ***********************************
// *************************************************************************
output sync_signal_out ,
output reg sync_gnd = 1'b0
);
@@ -270,6 +275,41 @@ wire [11:0] freq_hop_words_vio ;
wire hop_words_valid_vio;
wire freq_hop_switch_vio;
// rf auto switch frequency function
wire auto_test_enable_vio;
wire rf_auto_start_vio ;
wire rf_ctrl_mode_vio ;
wire switch_next_freq_vio;
wire switch_last_freq_vio;
wire [31:0] cnt_valid_to_switch_vio;
wire [31:0] test_slot_length_vio;
wire [11:0] freq_hop_words_auto ;
wire hop_words_valid_auto;
wire freq_hop_switch_auto;
rf_auto_switch_freq u_rf_auto_switch_freq(
.clk (sig_clk_4x ),
.rst (sig_rst ),
// vio control
.start (rf_auto_start_vio ), // rise-edge active, if start, change freq word to the first
.auto_test_enable (auto_test_enable_vio ), // rise-edge active
.rf_ctrl_mode (rf_ctrl_mode_vio ), // 1 : auto switch, 0 : manual switch
.switch_next_freq (switch_next_freq_vio ), // rise-edge active
.switch_last_freq (switch_last_freq_vio ), // rise-edge active
.cnt_valid_to_switch (cnt_valid_to_switch_vio ), // the clock number from valid to switch
.test_slot_length (test_slot_length_vio[31:0] ),
// input
.freq_hop_words_vio (freq_hop_words_vio[11:0] ),
.hop_words_valid_vio (hop_words_valid_vio ),
.freq_hop_switch_vio (freq_hop_switch_vio ),
// output
.freq_hop_words_auto (freq_hop_words_auto[11:0] ),
.hop_words_valid_auto (hop_words_valid_auto ),
.freq_hop_switch_auto (freq_hop_switch_auto ),
.sync_signal (sync_signal_out )
);
rf_control u_rf_control
(
// clock & reset
@@ -292,9 +332,9 @@ rf_control u_rf_control
.rf_txrx_vio (rf_txrx_vio[1:0] ), // vio控制收发，1发2收
// vio freq control
.freq_hop_words_vio (freq_hop_words_vio[11:0] ), // vio设置跳频频率控制字
.hop_words_valid_vio (hop_words_valid_vio ), // vio设置跳频频率控制字有效脉冲
.freq_hop_switch_vio (freq_hop_switch_vio ), // vio设置频点切换脉冲
.freq_hop_words_vio (freq_hop_words_auto[11:0] ), // vio设置跳频频率控制字
.hop_words_valid_vio (hop_words_valid_auto ), // vio设置跳频频率控制字有效脉冲
.freq_hop_switch_vio (freq_hop_switch_auto ), // vio设置频点切换脉冲
// manual configuration
.vio_set_trx (vio_set_trx ), // 0: 网络层控制收发，1: vio控制收发
@@ -431,16 +471,24 @@ vio_manual_ctrl u_vio_manual_ctrl
vio_RF_control u_vio_rf_control
(
.clk (sig_clk_4x ), // input wire clk
.probe_out0 (vio_set_trx ), // output wire [0 : 0] probe_out0
.probe_out1 (rf_txrx_vio[1:0] ), // output wire [1 : 0] probe_out1
.probe_out2 (vio_set_freq ), // output wire [0 : 0] probe_out2
.probe_out3 (tx_gain_manual[7:0] ), // output wire [5 : 0] probe_out3
.probe_out4 (rx_gain_manual[7:0] ), // output wire [5 : 0] probe_out4
.probe_out5 (freq_hop_words_vio[11:0] ), // output wire [10 : 0] probe_out5
.probe_out6 (hop_words_valid_vio ), // output wire [0 : 0] probe_out6
.probe_out7 (freq_hop_switch_vio ), // output wire [0 : 0] probe_out7
.probe_out8 (rf_config_valid ) // output wire [0 : 0] probe_out8
.clk (sig_clk_4x ), // input wire clk
.probe_out0 (vio_set_trx ), // output wire [0 : 0] probe_out0
.probe_out1 (rf_txrx_vio[1:0] ), // output wire [1 : 0] probe_out1
.probe_out2 (vio_set_freq ), // output wire [0 : 0] probe_out2
.probe_out3 (tx_gain_manual[7:0] ), // output wire [5 : 0] probe_out3
.probe_out4 (rx_gain_manual[7:0] ), // output wire [5 : 0] probe_out4
.probe_out5 (freq_hop_words_vio[11:0] ), // output wire [11 : 0] probe_out5
.probe_out6 (hop_words_valid_vio ), // output wire [0 : 0] probe_out6
.probe_out7 (freq_hop_switch_vio ), // output wire [0 : 0] probe_out7
.probe_out8 (rf_config_valid ), // output wire [0 : 0] probe_out8
.probe_out9 (rf_auto_start_vio ), // output wire [0 : 0] probe_out9
.probe_out10(rf_ctrl_mode_vio ), // output wire [0 : 0] probe_out10
.probe_out11(switch_next_freq_vio ), // output wire [0 : 0] probe_out11
.probe_out12(switch_last_freq_vio ), // output wire [0 : 0] probe_out12
.probe_out13(cnt_valid_to_switch_vio[31:0] ), // output wire [31: 0] probe_out13
.probe_out14(auto_test_enable_vio ), // output wire [0 : 0] probe_out14
.probe_out15(test_slot_length_vio[31:0] ), // output wire [31: 0] probe_out15
.probe_in0 (freq_hop_words_auto[11:0] ) // input wire [11: 0] probe_in0
);
ila_rf_test u_ila_rf_test