add ant data; add null algorithm switch

to evaluate amp-phase consistency of phased array at different frequency, tens of data set is sampled; in dl814_k7_cal_coarse, the switch of ad9361 data and test data is added, and the depth of rx data ila is enlarged to 131072
This commit is contained in:
2023-04-24 12:58:33 +08:00
parent 14a5d6e48a
commit 78e60b6e2d
140 changed files with 1929 additions and 275 deletions
@@ -457,7 +457,7 @@ ant_rf_ctrl u_ant_rf_ctrl
.ant_data (rf_data ), // output ant_data
.ant_tr (rf_tr ), // output ant_tr
.ant_dary (rf_dary ), // output ant_dary
.ant_dout (rf_dout ), // input ant_dout
.ant_dout (ant_dout1_d2), // input ant_dout
.rf_standby (rf_standby ), // output rf_standby
.rf_sw_pll (rf_sw_pll ), // output rf_sw_pll
@@ -602,6 +602,8 @@ wire rx_data_valid;
wire [29:0] rx_data_i, rx_data_q;
wire hop_trigger;
wire hop_trigger_en;
wire rx_test_en;
wire hop_start_flag ;
// wire accor_stream_valid ;
@@ -619,7 +621,7 @@ always @(posedge sys_clk) begin
rx_ch3_q <= 'b0;
rx_ch4_q <= 'b0;
end
else if (ad9361_cal_valid) begin
else if (rx_test_en && ad9361_cal_valid) begin
rx_ch1_i <= rx_ch1_i_test;
rx_ch2_i <= rx_ch2_i_test;
rx_ch3_i <= rx_ch3_i_test;
@@ -877,14 +879,14 @@ vio_rf_rd u_vio_rf_rd (
// .probe_in5 (u_ant_rf_ctrl.Ant_RecvWord_last ) // input wire [127 : 0] probe_in5
// );
ila_2x12x1024 u_ila_tx
ila_2x12x131072 u_ila_tx
(
.clk (sys_clk ), // input wire clk
.probe0 (tx_ch1_i ), // input wire [11:0] probe0
.probe1 (tx_ch1_q ) // input wire [11:0] probe1
);
ila_8x12_2x30_8192 u_ila_rx
ila_8x12_2x30_131072 u_ila_rx
(
.clk (sys_clk ), // input wire clk
.probe0 (u_rx_pre_process.rx_cal_ch1_i ), // input wire [11:0] probe0
@@ -957,7 +959,8 @@ vio_manual_ctrl u_vio_manual_ctrl
.probe_out1 (sweep_on ), // output wire [0 : 0] probe_out1
.probe_out2 (freq_set[31:0] ), // output wire [31 : 0] probe_out2
.probe_out3 (iq_sel[1:0] ), // output wire [1 : 0] probe_out3
.probe_out4 (bb_rshift[3:0] ) // output wire [3 : 0] probe_out4
.probe_out4 (bb_rshift[3:0] ), // output wire [3 : 0] probe_out4
.probe_out5 (rx_test_en ) // output wire [0 : 0] probe_out5
);
vio_hop u_vio_hop