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add phase compensate to duifei online acq

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josh
2023-05-16 20:44:17 +08:00
parent 986a2ea1e1
commit b2a6a62da0
249 changed files with 15824 additions and 2162 deletions
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projects/duifei/duifei_online_acq_par/rtl/system_top.v
+62 -1
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@@ -676,6 +676,50 @@ ad9361_phase_cal_coarse u_ad9361_phase_cal
// <--------------------------------------------------------------------------->
// <----------------------- insert receiver logic below ----------------------->
// <--------------------------------------------------------------------------->
// weighted summation
wire [11:0] vio_sin_0;
wire [11:0] vio_sin_1;
wire [11:0] vio_sin_2;
wire [11:0] vio_sin_3;
wire [11:0] vio_cos_0;
wire [11:0] vio_cos_1;
wire [11:0] vio_cos_2;
wire [11:0] vio_cos_3;
wire [4:0] vio_trunc;
wire trunc_overflow;
wire [15:0] dout_i;
wire [15:0] dout_q;
phase_compensate u_phase_compensate
(
.clk (sys_clk ), // input clk
.rst (sys_rst ), // input rst
.vio_sin_0 (vio_sin_0 ), // input [11:0] vio_sin_0
.vio_sin_1 (vio_sin_1 ), // input [11:0] vio_sin_1
.vio_sin_2 (vio_sin_2 ), // input [11:0] vio_sin_2
.vio_sin_3 (vio_sin_3 ), // input [11:0] vio_sin_3
.vio_cos_0 (vio_cos_0 ), // input [11:0] vio_cos_0
.vio_cos_1 (vio_cos_1 ), // input [11:0] vio_cos_1
.vio_cos_2 (vio_cos_2 ), // input [11:0] vio_cos_2
.vio_cos_3 (vio_cos_3 ), // input [11:0] vio_cos_3
.din_i_0 (rx_cal_ch1_i ), // input [11:0] din_i_0
.din_i_1 (rx_cal_ch2_i ), // input [11:0] din_i_1
.din_i_2 (rx_cal_ch3_i ), // input [11:0] din_i_2
.din_i_3 (rx_cal_ch4_i ), // input [11:0] din_i_3
.din_q_0 (rx_cal_ch1_q ), // input [11:0] din_q_0
.din_q_1 (rx_cal_ch2_q ), // input [11:0] din_q_1
.din_q_2 (rx_cal_ch3_q ), // input [11:0] din_q_2
.din_q_3 (rx_cal_ch4_q ), // input [11:0] din_q_3
.vio_trunc (vio_trunc ), // input [4:0] vio_trunc
.dout_i (dout_i ), // output [15:0] dout_i
.dout_q (dout_q ), // output [15:0] dout_q
.trunc_overflow (trunc_overflow ) // output trunc_overflow
);
// online acquisition
wire freq_comp_start ;
wire freq_comp_auto_enable_vio;
wire freq_comp_start_vio;
@@ -952,7 +996,9 @@ ila_rx_data_cnt u_ila_rx
.probe6 (rx_cal_ch4_i ), // input wire [11:0] probe6
.probe7 (rx_cal_ch4_q ), // input wire [11:0] probe7
.probe8 (vio_frequency_auto[11:0] ), // input wire [11:0] probe8
.probe9 (chip_cnt ) // input wire [9:0] probe9
.probe9 (chip_cnt ), // input wire [9:0] probe9
.probe10(dout_i ), // input wire [15:0] probe10
.probe11(dout_q ) // input wire [15:0] probe11
);
ila_cal u_ila_cal
@@ -1023,4 +1069,19 @@ ila_freq_comp u_ila_freq_comp
.probe20(vio_frequency_auto[11:0] ) // input wire [11:0] probe20
);
vio_phase_comp u_vio_phase_comp
(
.clk (sys_clk ), // input wire clk
.probe_in0 (trunc_overflow ), // input wire [0 : 0] probe_in0
.probe_out0 (vio_sin_0 ), // output wire [11 : 0] probe_out0
.probe_out1 (vio_sin_1 ), // output wire [11 : 0] probe_out1
.probe_out2 (vio_sin_2 ), // output wire [11 : 0] probe_out2
.probe_out3 (vio_sin_3 ), // output wire [11 : 0] probe_out3
.probe_out4 (vio_cos_0 ), // output wire [11 : 0] probe_out4
.probe_out5 (vio_cos_1 ), // output wire [11 : 0] probe_out5
.probe_out6 (vio_cos_2 ), // output wire [11 : 0] probe_out6
.probe_out7 (vio_cos_3 ), // output wire [11 : 0] probe_out7
.probe_out8 (vio_trunc ) // output wire [4 : 0] probe_out8
);
endmodule