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update adi_library to vivado 2024.1

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compile adi_library with latest hdl commit and vivado 2024.1
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josh
2024-06-06 11:22:50 +08:00
parent 3c6c573f6a
commit 24cc6b9ee9
695 changed files with 17906 additions and 9982 deletions
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adi_library/axi_ad7768/component.xml
+6 -6
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@@ -301,7 +301,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
<spirit:value>0214c281</spirit:value>
<spirit:value>55f5cc13</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -317,7 +317,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
<spirit:value>baa268ac</spirit:value>
<spirit:value>5e795ebb</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -1446,7 +1446,7 @@
<spirit:file>
<spirit:name>axi_ad7768.v</spirit:name>
<spirit:fileType>verilogSource</spirit:fileType>
<spirit:userFileType>CHECKSUM_54865af8</spirit:userFileType>
<spirit:userFileType>CHECKSUM_6ab55465</spirit:userFileType>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
@@ -1560,11 +1560,11 @@
<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
<xilinx:vendorURL>https://wiki.analog.com/resources/fpga/docs/ad7768</xilinx:vendorURL>
<xilinx:coreRevision>1</xilinx:coreRevision>
<xilinx:coreCreationDateTime>2024-01-14T03:39:13Z</xilinx:coreCreationDateTime>
<xilinx:coreCreationDateTime>2024-06-06T02:54:52Z</xilinx:coreCreationDateTime>
</xilinx:coreExtensions>
<xilinx:packagingInfo>
<xilinx:xilinxVersion>2023.2.1</xilinx:xilinxVersion>
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="9f42b3c7"/>
<xilinx:xilinxVersion>2024.1</xilinx:xilinxVersion>
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="46450196"/>
<xilinx:checksum xilinx:scope="ports" xilinx:value="4bc981f3"/>
<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="e4476123"/>
<xilinx:checksum xilinx:scope="parameters" xilinx:value="2a4b4927"/>