initial commit, add dds_par module
This commit is contained in:
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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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LIBRARY_NAME := axi_fan_control
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GENERIC_DEPS += ../common/up_axi.v
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GENERIC_DEPS += ../common/util_pulse_gen.v
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GENERIC_DEPS += axi_fan_control.v
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XILINX_DEPS += axi_fan_control_ip.tcl
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include ../scripts/library.mk
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// ***************************************************************************
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// ***************************************************************************
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// Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
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//
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// In this HDL repository, there are many different and unique modules, consisting
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// of various HDL (Verilog or VHDL) components. The individual modules are
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// developed independently, and may be accompanied by separate and unique license
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// terms.
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//
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// The user should read each of these license terms, and understand the
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// freedoms and responsibilities that he or she has by using this source/core.
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//
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// This core is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
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// A PARTICULAR PURPOSE.
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//
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// Redistribution and use of source or resulting binaries, with or without modification
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// of this file, are permitted under one of the following two license terms:
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//
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// 1. The GNU General Public License version 2 as published by the
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// Free Software Foundation, which can be found in the top level directory
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// of this repository (LICENSE_GPL2), and also online at:
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// <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
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//
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// OR
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//
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// 2. An ADI specific BSD license, which can be found in the top level directory
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// of this repository (LICENSE_ADIBSD), and also on-line at:
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// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
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// This will allow to generate bit files and not release the source code,
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// as long as it attaches to an ADI device.
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//
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// ***************************************************************************
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// ***************************************************************************
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`timescale 1ns / 1ps
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module axi_fan_control #(
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parameter ID = 0,
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parameter PWM_FREQUENCY_HZ = 5000,
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parameter INTERNAL_SYSMONE = 0,
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parameter AVG_POW = 7, //do not exceede 7
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//temperature thresholds defined to match sysmon reg values
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parameter TACHO_TOL_PERCENT = 25,
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parameter TACHO_T25 = 1470000, // 14.7 ms
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parameter TACHO_T50 = 820000, // 8.2 ms
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parameter TACHO_T75 = 480000, // 4.8 ms
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parameter TACHO_T100 = 340000, // 3.4 ms
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parameter TEMP_00_H = 05,
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parameter TEMP_25_L = 20,
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parameter TEMP_25_H = 40,
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parameter TEMP_50_L = 60,
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parameter TEMP_50_H = 70,
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parameter TEMP_75_L = 80,
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parameter TEMP_75_H = 90,
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parameter TEMP_00_L = 95
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) (
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input [ 9:0] temp_in,
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input tacho,
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output reg irq,
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output pwm,
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//axi interface
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input s_axi_aclk,
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input s_axi_aresetn,
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input s_axi_awvalid,
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input [15:0] s_axi_awaddr,
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input [ 2:0] s_axi_awprot,
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output s_axi_awready,
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input s_axi_wvalid,
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input [31:0] s_axi_wdata,
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input [ 3:0] s_axi_wstrb,
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output s_axi_wready,
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output s_axi_bvalid,
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output [ 1:0] s_axi_bresp,
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input s_axi_bready,
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input s_axi_arvalid,
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input [15:0] s_axi_araddr,
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input [ 2:0] s_axi_arprot,
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output s_axi_arready,
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output s_axi_rvalid,
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output [ 1:0] s_axi_rresp,
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output [31:0] s_axi_rdata,
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input s_axi_rready
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);
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//local parameters
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localparam [31:0] CORE_VERSION = {16'h0001, /* MAJOR */
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8'h00, /* MINOR */
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8'h61}; /* PATCH */ // 0.0.0
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localparam [31:0] CORE_MAGIC = 32'h46414E43; // FANC
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localparam CLK_FREQUENCY = 100000000;
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localparam PWM_PERIOD = CLK_FREQUENCY / PWM_FREQUENCY_HZ;
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localparam OVERFLOW_LIM = CLK_FREQUENCY * 5;
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localparam AVERAGE_DIV = 2**AVG_POW;
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localparam THRESH_PWM_000 = (INTERNAL_SYSMONE == 1) ? (((TEMP_00_H + 280.2308787) * 65535) / 509.3140064) : ((TEMP_00_H * 41 + 11195) / 20);
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localparam THRESH_PWM_025_L = (INTERNAL_SYSMONE == 1) ? (((TEMP_25_L + 280.2308787) * 65535) / 509.3140064) : ((TEMP_25_L * 41 + 11195) / 20);
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localparam THRESH_PWM_025_H = (INTERNAL_SYSMONE == 1) ? (((TEMP_25_H + 280.2308787) * 65535) / 509.3140064) : ((TEMP_25_H * 41 + 11195) / 20);
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localparam THRESH_PWM_050_L = (INTERNAL_SYSMONE == 1) ? (((TEMP_50_L + 280.2308787) * 65535) / 509.3140064) : ((TEMP_50_L * 41 + 11195) / 20);
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localparam THRESH_PWM_050_H = (INTERNAL_SYSMONE == 1) ? (((TEMP_50_H + 280.2308787) * 65535) / 509.3140064) : ((TEMP_50_H * 41 + 11195) / 20);
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localparam THRESH_PWM_075_L = (INTERNAL_SYSMONE == 1) ? (((TEMP_75_L + 280.2308787) * 65535) / 509.3140064) : ((TEMP_75_L * 41 + 11195) / 20);
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localparam THRESH_PWM_075_H = (INTERNAL_SYSMONE == 1) ? (((TEMP_75_H + 280.2308787) * 65535) / 509.3140064) : ((TEMP_75_H * 41 + 11195) / 20);
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localparam THRESH_PWM_100 = (INTERNAL_SYSMONE == 1) ? (((TEMP_00_L + 280.2308787) * 65535) / 509.3140064) : ((TEMP_00_L * 41 + 11195) / 20);
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//pwm params
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localparam PWM_ONTIME_25 = PWM_PERIOD / 4;
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localparam PWM_ONTIME_50 = PWM_PERIOD / 2;
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localparam PWM_ONTIME_75 = PWM_PERIOD * 3 / 4;
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//tacho params
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localparam TACHO_T25_TOL = TACHO_T25 * TACHO_TOL_PERCENT / 100;
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localparam TACHO_T50_TOL = TACHO_T50 * TACHO_TOL_PERCENT / 100;
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localparam TACHO_T75_TOL = TACHO_T75 * TACHO_TOL_PERCENT / 100;
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localparam TACHO_T100_TOL = TACHO_T100 * TACHO_TOL_PERCENT / 100;
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//state machine states
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localparam INIT = 8'h00;
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localparam DRP_WAIT_EOC = 8'h01;
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localparam DRP_WAIT_DRDY = 8'h02;
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localparam DRP_WAIT_FSM_EN = 8'h03;
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localparam DRP_READ_TEMP = 8'h04;
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localparam DRP_READ_TEMP_WAIT_DRDY = 8'h05;
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localparam GET_TACHO = 8'h06;
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localparam EVAL_TEMP = 8'h07;
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localparam SET_PWM = 8'h08;
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localparam EVAL_TACHO = 8'h09;
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reg [31:0] up_scratch = 'd0;
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reg [7:0] state = INIT;
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reg [7:0] drp_daddr = 'h0;
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reg [15:0] drp_di = 'h0;
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reg [1:0] drp_den_reg = 'h0;
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reg [1:0] drp_dwe_reg = 'h0;
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reg [15:0] sysmone_temp = 'h0;
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reg temp_increase_alarm = 'h0;
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reg tacho_alarm = 'h0;
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reg [31:0] up_tacho_val = 'h0;
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reg [31:0] up_tacho_tol = 'h0;
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reg up_tacho_en = 'h0;
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reg [7:0] tacho_avg_cnt = 'h0;
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reg [31:0] tacho_avg_sum = 'h0;
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reg [31:0] tacho_meas = 'h0;
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reg tacho_delayed = 'h0;
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reg tacho_meas_new = 'h0;
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reg tacho_meas_ack = 'h0;
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reg tacho_edge_det = 'h0;
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reg [31:0] up_tacho_avg_sum = 'h0;
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reg [31:0] counter_reg = 'h0;
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reg [31:0] pwm_width = 'h0;
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reg [31:0] pwm_width_req = 'h0;
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reg counter_overflow = 'h0;
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reg pwm_change_done = 1'b1;
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reg pulse_gen_load_config = 'h0;
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reg tacho_meas_int = 'h0;
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reg [15:0] presc_reg = 'h0;
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reg [31:0] up_pwm_width = 'd0;
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reg [31:0] up_temp_00_h = THRESH_PWM_000 ;
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reg [31:0] up_temp_25_l = THRESH_PWM_025_L;
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reg [31:0] up_temp_25_h = THRESH_PWM_025_H;
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reg [31:0] up_temp_50_l = THRESH_PWM_050_L;
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reg [31:0] up_temp_50_h = THRESH_PWM_050_H;
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reg [31:0] up_temp_75_l = THRESH_PWM_075_L;
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reg [31:0] up_temp_75_h = THRESH_PWM_075_H;
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reg [31:0] up_temp_100_l = THRESH_PWM_100 ;
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reg [31:0] up_tacho_25 = TACHO_T25;
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reg [31:0] up_tacho_50 = TACHO_T50;
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reg [31:0] up_tacho_75 = TACHO_T75;
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reg [31:0] up_tacho_100 = TACHO_T100;
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reg [31:0] up_tacho_25_tol = TACHO_T25 * TACHO_TOL_PERCENT / 100;
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reg [31:0] up_tacho_50_tol = TACHO_T50 * TACHO_TOL_PERCENT / 100;
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reg [31:0] up_tacho_75_tol = TACHO_T75 * TACHO_TOL_PERCENT / 100;
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reg [31:0] up_tacho_100_tol = TACHO_T100 * TACHO_TOL_PERCENT / 100;
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reg up_wack = 'd0;
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reg [31:0] up_rdata = 'd0;
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reg up_rack = 'd0;
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reg up_resetn = 1'b0;
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reg [3:0] up_irq_mask = 4'b1111;
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reg [3:0] up_irq_source = 4'h0;
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wire counter_resetn;
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wire [15:0] drp_do;
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wire drp_drdy;
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wire drp_eoc;
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wire drp_eos;
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wire pwm_change_done_int;
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wire pulse_gen_out;
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wire up_clk;
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wire up_rreq_s;
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wire [7:0] up_raddr_s;
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wire up_wreq_s;
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wire [7:0] up_waddr_s;
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wire [31:0] up_wdata_s;
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wire [3:0] up_irq_pending;
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wire [3:0] up_irq_trigger;
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wire [3:0] up_irq_source_clear;
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assign up_clk = s_axi_aclk;
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assign pwm = ~pulse_gen_out & up_resetn; //reverse polarity because the board is also reversing it
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assign pwm_change_done_int = counter_overflow & !pwm_change_done;
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//IRQ handling
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assign up_irq_pending = ~up_irq_mask & up_irq_source;
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assign up_irq_trigger = {tacho_meas_int, temp_increase_alarm, tacho_alarm, pwm_change_done_int};
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assign up_irq_source_clear = (up_wreq_s == 1'b1 && up_waddr_s == 8'h11) ? up_wdata_s[3:0] : 4'b0000;
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//switching the reset signal for the counter
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//counter is used to measure tacho and to provide delay between pwm_ontime changes
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assign counter_resetn = (pwm_change_done ) ? (!tacho_edge_det) : ((!pwm_change_done) & (!counter_overflow));
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up_axi #(
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.AXI_ADDRESS_WIDTH(10)
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) i_up_axi (
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.up_rstn (s_axi_aresetn),
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.up_clk (up_clk),
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.up_axi_awvalid (s_axi_awvalid),
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.up_axi_awaddr (s_axi_awaddr),
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.up_axi_awready (s_axi_awready),
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.up_axi_wvalid (s_axi_wvalid),
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.up_axi_wdata (s_axi_wdata),
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.up_axi_wstrb (s_axi_wstrb),
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.up_axi_wready (s_axi_wready),
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.up_axi_bvalid (s_axi_bvalid),
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.up_axi_bresp (s_axi_bresp),
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.up_axi_bready (s_axi_bready),
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.up_axi_arvalid (s_axi_arvalid),
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.up_axi_araddr (s_axi_araddr),
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.up_axi_arready (s_axi_arready),
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.up_axi_rvalid (s_axi_rvalid),
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.up_axi_rresp (s_axi_rresp),
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.up_axi_rdata (s_axi_rdata),
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.up_axi_rready (s_axi_rready),
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.up_wreq (up_wreq_s),
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.up_waddr (up_waddr_s),
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.up_wdata (up_wdata_s),
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.up_wack (up_wack),
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.up_rreq (up_rreq_s),
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.up_raddr (up_raddr_s),
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.up_rdata (up_rdata),
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.up_rack (up_rack));
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generate
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if (INTERNAL_SYSMONE == 1) begin
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SYSMONE4 #(
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.COMMON_N_SOURCE(16'hFFFF),
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.INIT_40(16'h1000), // config reg 0
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.INIT_41(16'h2F9F), // config reg 1
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.INIT_42(16'h1400), // config reg 2
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.INIT_43(16'h200F), // config reg 3
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.INIT_44(16'h0000), // config reg 4
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.INIT_45(16'hE200), // Analog Bus Register
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.INIT_46(16'h0000), // Sequencer Channel selection (Vuser0-3)
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.INIT_47(16'h0000), // Sequencer Average selection (Vuser0-3)
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.INIT_48(16'h0101), // Sequencer channel selection
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.INIT_49(16'h0000), // Sequencer channel selection
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.INIT_4A(16'h0000), // Sequencer Average selection
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.INIT_4B(16'h0000), // Sequencer Average selection
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.INIT_4C(16'h0000), // Sequencer Bipolar selection
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.INIT_4D(16'h0000), // Sequencer Bipolar selection
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.INIT_4E(16'h0000), // Sequencer Acq time selection
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.INIT_4F(16'h0000), // Sequencer Acq time selection
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.INIT_50(16'hB794), // Temp alarm trigger
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.INIT_51(16'h4E81), // Vccint upper alarm limit
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.INIT_52(16'hA147), // Vccaux upper alarm limit
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.INIT_53(16'hBF13), // Temp alarm OT upper
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.INIT_54(16'hAB02), // Temp alarm reset
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.INIT_55(16'h4963), // Vccint lower alarm limit
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.INIT_56(16'h9555), // Vccaux lower alarm limit
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.INIT_57(16'hB00A), // Temp alarm OT reset
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.INIT_58(16'h4E81), // VCCBRAM upper alarm limit
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.INIT_5C(16'h4963), // VCCBRAM lower alarm limit
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.INIT_59(16'h4963), // vccpsintlp upper alarm limit
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.INIT_5D(16'h451E), // vccpsintlp lower alarm limit
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.INIT_5A(16'h4963), // vccpsintfp upper alarm limit
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.INIT_5E(16'h451E), // vccpsintfp lower alarm limit
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.INIT_5B(16'h9A74), // vccpsaux upper alarm limit
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.INIT_5F(16'h91EB), // vccpsaux lower alarm limit
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.INIT_60(16'h4D39), // Vuser0 upper alarm limit
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.INIT_61(16'h4DA7), // Vuser1 upper alarm limit
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.INIT_62(16'h9A74), // Vuser2 upper alarm limit
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.INIT_63(16'h9A74), // Vuser3 upper alarm limit
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.INIT_68(16'h4C5E), // Vuser0 lower alarm limit
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.INIT_69(16'h4BF2), // Vuser1 lower alarm limit
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.INIT_6A(16'h98BF), // Vuser2 lower alarm limit
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.INIT_6B(16'h98BF), // Vuser3 lower alarm limit
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.INIT_7A(16'h0000), // DUAL0 Register
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.INIT_7B(16'h0000), // DUAL1 Register
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.INIT_7C(16'h0000), // DUAL2 Register
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.INIT_7D(16'h0000), // DUAL3 Register
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.SIM_DEVICE("ZYNQ_ULTRASCALE"),
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.SIM_MONITOR_FILE("design.txt")
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) inst_sysmon (
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.DADDR(drp_daddr),
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.DCLK(up_clk),
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.DEN(drp_den_reg[0]),
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.DI(drp_di),
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.DWE(drp_dwe_reg[0]),
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.RESET(!up_resetn),
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.DO(drp_do),
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.DRDY(drp_drdy),
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.EOC(drp_eoc),
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.EOS(drp_eos));
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end
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endgenerate
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//pulse generator instance
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util_pulse_gen #(
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.PULSE_WIDTH(0),
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.PULSE_PERIOD(0)
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) util_pulse_gen_i(
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.clk (up_clk),
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.rstn (up_resetn),
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.pulse_width (pwm_width),
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.pulse_period (PWM_PERIOD),
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.load_config (pulse_gen_load_config),
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||||
.pulse (pulse_gen_out));
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//state machine
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||||
always @(posedge up_clk)
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||||
if (up_resetn == 1'b0) begin
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||||
tacho_alarm <= 'h0;
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drp_den_reg <= 'h0;
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||||
drp_dwe_reg <= 'h0;
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drp_di <= 'h0;
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tacho_avg_cnt <= 'h0;
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tacho_avg_sum <= 'h0;
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tacho_meas_ack <= 'h0;
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pulse_gen_load_config <= 'h0;
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||||
sysmone_temp <= 'h0;
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pwm_width_req <= 'h0;
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pwm_width <= 'h0;
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||||
up_tacho_avg_sum <= 'h0;
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||||
temp_increase_alarm <= 'h0;
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||||
tacho_meas_int <= 1'b0;
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||||
state <= INIT;
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||||
end else begin
|
||||
|
||||
case (state)
|
||||
|
||||
INIT : begin
|
||||
if (INTERNAL_SYSMONE == 1) begin
|
||||
drp_daddr <= 8'h40;
|
||||
// performing read
|
||||
drp_den_reg <= 2'h2;
|
||||
if (drp_eoc == 1'b1) begin
|
||||
state <= DRP_WAIT_EOC;
|
||||
end
|
||||
end else begin
|
||||
state <= DRP_READ_TEMP;
|
||||
end
|
||||
end
|
||||
|
||||
DRP_WAIT_EOC : begin
|
||||
if (drp_eoc == 1'b1) begin
|
||||
//Clearing AVG bits for Configreg0
|
||||
drp_di <= drp_do & 16'h03FF;
|
||||
drp_daddr <= 8'h40;
|
||||
drp_den_reg <= 2'h2;
|
||||
// performing write
|
||||
drp_dwe_reg <= 2'h2;
|
||||
state <= DRP_WAIT_DRDY;
|
||||
end else begin
|
||||
drp_den_reg <= {1'b0, drp_den_reg[1]};
|
||||
drp_dwe_reg <= {1'b0, drp_dwe_reg[1]};
|
||||
end
|
||||
end
|
||||
|
||||
DRP_WAIT_DRDY : begin
|
||||
if (drp_drdy == 1'b1) begin
|
||||
state <= DRP_READ_TEMP;
|
||||
end else begin
|
||||
drp_den_reg <= {1'b0, drp_den_reg[1]};
|
||||
drp_dwe_reg <= {1'b0, drp_dwe_reg[1]};
|
||||
end
|
||||
end
|
||||
|
||||
DRP_WAIT_FSM_EN : begin
|
||||
tacho_meas_int <= 1'b0;
|
||||
tacho_alarm <= 1'b0;
|
||||
pulse_gen_load_config <= 1'b0;
|
||||
if (presc_reg[15] == 1'b1) begin
|
||||
state <= DRP_READ_TEMP;
|
||||
end
|
||||
end
|
||||
|
||||
DRP_READ_TEMP : begin
|
||||
if (INTERNAL_SYSMONE == 1) begin
|
||||
drp_daddr <= 8'h00;
|
||||
// performing read
|
||||
drp_den_reg <= 2'h2;
|
||||
if (drp_eos == 1'b1) begin
|
||||
state <= DRP_READ_TEMP_WAIT_DRDY;
|
||||
end
|
||||
end else begin
|
||||
state <= DRP_READ_TEMP_WAIT_DRDY;
|
||||
end
|
||||
end
|
||||
|
||||
DRP_READ_TEMP_WAIT_DRDY : begin
|
||||
if (INTERNAL_SYSMONE == 1) begin
|
||||
if (drp_drdy == 1'b1) begin
|
||||
sysmone_temp <= drp_do;
|
||||
state <= GET_TACHO;
|
||||
end else begin
|
||||
drp_den_reg <= {1'b0, drp_den_reg[1]};
|
||||
drp_dwe_reg <= {1'b0, drp_dwe_reg[1]};
|
||||
end
|
||||
end else begin
|
||||
sysmone_temp <= temp_in;
|
||||
state <= GET_TACHO;
|
||||
end
|
||||
end
|
||||
|
||||
GET_TACHO : begin
|
||||
//adding up tacho measurements in order to obtain a mean value from 32 samples
|
||||
if ((tacho_avg_cnt == AVERAGE_DIV) || (counter_overflow) || (!pwm_change_done)) begin
|
||||
//once a set measurements has been obtained, reset the values
|
||||
tacho_avg_sum <= 1'b0;
|
||||
tacho_avg_cnt <= 1'b0;
|
||||
tacho_meas_ack <= 1'b0;
|
||||
end else if ((tacho_meas_new) && (pwm_change_done)) begin
|
||||
//tacho_meas_new and tacho_meas_ack ensure the value is read at the right time and only once
|
||||
tacho_avg_sum <= tacho_avg_sum + tacho_meas;
|
||||
tacho_avg_cnt <= tacho_avg_cnt + 1'b1;
|
||||
//acknowledge tha the current values has been added
|
||||
tacho_meas_ack <= 1'b1;
|
||||
end else begin
|
||||
tacho_meas_ack <= 1'b0;
|
||||
end
|
||||
state <= EVAL_TEMP;
|
||||
end
|
||||
|
||||
EVAL_TEMP : begin
|
||||
//pwm section
|
||||
//the pwm only has to be changed when passing through these temperature intervals
|
||||
if (sysmone_temp < up_temp_00_h) begin
|
||||
//PWM DUTY should be 0%
|
||||
pwm_width_req <= 1'b0;
|
||||
end else if ((sysmone_temp > up_temp_25_l) && (sysmone_temp < up_temp_25_h)) begin
|
||||
//PWM DUTY should be 25%
|
||||
pwm_width_req <= PWM_ONTIME_25;
|
||||
end else if ((sysmone_temp > up_temp_50_l) && (sysmone_temp < up_temp_50_h)) begin
|
||||
//PWM DUTY should be 50%
|
||||
pwm_width_req <= PWM_ONTIME_50;
|
||||
end else if ((sysmone_temp > up_temp_75_l) && (sysmone_temp < up_temp_75_h)) begin
|
||||
//PWM DUTY should be 75%
|
||||
pwm_width_req <= PWM_ONTIME_75;
|
||||
end else if (sysmone_temp > up_temp_100_l) begin
|
||||
//PWM DUTY should be 100%
|
||||
pwm_width_req <= PWM_PERIOD;
|
||||
//default to 100% duty cycle after reset if not within temperature intervals described above
|
||||
end else if ((sysmone_temp != 'h0) && (pwm_width == 'h0)) begin
|
||||
pwm_width_req <= PWM_PERIOD;
|
||||
end else begin
|
||||
//if no changes are needed make sure to mantain current pwm
|
||||
pwm_width_req <= pwm_width;
|
||||
end
|
||||
state <= SET_PWM;
|
||||
end
|
||||
|
||||
SET_PWM : begin
|
||||
if ((up_pwm_width != pwm_width) && (up_pwm_width >= pwm_width_req) && (up_pwm_width <= PWM_PERIOD) && (pwm_change_done)) begin
|
||||
pwm_width <= up_pwm_width;
|
||||
pulse_gen_load_config <= 1'b1;
|
||||
//clear alarm when pwm duty changes
|
||||
end else if ((pwm_width != pwm_width_req) && (pwm_width_req > up_pwm_width) && (pwm_change_done)) begin
|
||||
pwm_width <= pwm_width_req;
|
||||
pulse_gen_load_config <= 1'b1;
|
||||
temp_increase_alarm <= 1'b1;
|
||||
//clear alarm when pwm duty changes
|
||||
end
|
||||
state <= EVAL_TACHO;
|
||||
end
|
||||
|
||||
EVAL_TACHO : begin
|
||||
temp_increase_alarm <= 1'b0;
|
||||
//tacho section
|
||||
//check if the fan is turning then see if it is turning correctly
|
||||
if(counter_overflow & pwm_change_done) begin
|
||||
//if overflow is 1 then the fan is not turning so do something
|
||||
tacho_alarm <= 1'b1;
|
||||
end else if (tacho_avg_cnt == AVERAGE_DIV) begin
|
||||
//check rpm according to the current pwm duty cycle
|
||||
//tacho_alarm is only asserted for certain known pwm duty cycles and
|
||||
//for timeout
|
||||
up_tacho_avg_sum <= tacho_avg_sum [AVG_POW + 24 : AVG_POW];
|
||||
tacho_meas_int <= 1'b1;
|
||||
if ((pwm_width == PWM_ONTIME_25) && (up_tacho_en == 0)) begin
|
||||
if ((tacho_avg_sum [AVG_POW + 24 : AVG_POW] > up_tacho_25 + up_tacho_25_tol) || (tacho_avg_sum [AVG_POW + 24 : AVG_POW] < up_tacho_25 - up_tacho_25_tol)) begin
|
||||
//the fan is turning but not as expected
|
||||
tacho_alarm <= 1'b1;
|
||||
end
|
||||
end else if ((pwm_width == PWM_ONTIME_50) && (up_tacho_en == 0)) begin
|
||||
if ((tacho_avg_sum [AVG_POW + 24 : AVG_POW] > up_tacho_50 + up_tacho_50_tol) || (tacho_avg_sum [AVG_POW + 24 : AVG_POW] < up_tacho_50 - up_tacho_50_tol)) begin
|
||||
//the fan is turning but not as expected
|
||||
tacho_alarm <= 1'b1;
|
||||
end
|
||||
end else if ((pwm_width == PWM_ONTIME_75) && (up_tacho_en == 0)) begin
|
||||
if ((tacho_avg_sum [AVG_POW + 24 : AVG_POW] > up_tacho_75 + up_tacho_75_tol) || (tacho_avg_sum [AVG_POW + 24 : AVG_POW] < up_tacho_75 - up_tacho_75_tol)) begin
|
||||
//the fan is turning but not as expected
|
||||
tacho_alarm <= 1'b1;
|
||||
end
|
||||
end else if ((pwm_width == PWM_PERIOD) && (up_tacho_en == 0)) begin
|
||||
if ((tacho_avg_sum [AVG_POW + 24 : AVG_POW] > up_tacho_100 + up_tacho_100_tol) || (tacho_avg_sum [AVG_POW + 24 : AVG_POW] < up_tacho_100 - up_tacho_100_tol)) begin
|
||||
//the fan is turning but not as expected
|
||||
tacho_alarm <= 1'b1;
|
||||
end
|
||||
end else if ((pwm_width == up_pwm_width) && up_tacho_en) begin
|
||||
if ((tacho_avg_sum [AVG_POW + 24 : AVG_POW] > up_tacho_val + up_tacho_tol) || (tacho_avg_sum [AVG_POW + 24 : AVG_POW] < up_tacho_val - up_tacho_tol)) begin
|
||||
//the fan is turning but not as expected
|
||||
tacho_alarm <= 1'b1;
|
||||
end
|
||||
end
|
||||
end
|
||||
state <= DRP_WAIT_FSM_EN;
|
||||
end
|
||||
default :
|
||||
state <= DRP_WAIT_FSM_EN;
|
||||
endcase
|
||||
end
|
||||
|
||||
//axi registers write
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
up_pwm_width <= 'd0;
|
||||
up_tacho_val <= 'd0;
|
||||
up_tacho_tol <= 'd0;
|
||||
up_tacho_en <= 'd0;
|
||||
up_scratch <= 'd0;
|
||||
up_temp_00_h <= THRESH_PWM_000;
|
||||
up_temp_25_l <= THRESH_PWM_025_L;
|
||||
up_temp_25_h <= THRESH_PWM_025_H;
|
||||
up_temp_50_l <= THRESH_PWM_050_L;
|
||||
up_temp_50_h <= THRESH_PWM_050_H;
|
||||
up_temp_75_l <= THRESH_PWM_075_L;
|
||||
up_temp_75_h <= THRESH_PWM_075_H;
|
||||
up_temp_100_l <= THRESH_PWM_100;
|
||||
up_tacho_25 <= TACHO_T25;
|
||||
up_tacho_50 <= TACHO_T50;
|
||||
up_tacho_75 <= TACHO_T75;
|
||||
up_tacho_100 <= TACHO_T100;
|
||||
up_tacho_25_tol <= TACHO_T25 * TACHO_TOL_PERCENT / 100;
|
||||
up_tacho_50_tol <= TACHO_T50 * TACHO_TOL_PERCENT / 100;
|
||||
up_tacho_75_tol <= TACHO_T75 * TACHO_TOL_PERCENT / 100;
|
||||
up_tacho_100_tol <= TACHO_T100 * TACHO_TOL_PERCENT / 100;
|
||||
up_irq_mask <= 4'b1111;
|
||||
end else begin
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h02)) begin
|
||||
up_scratch <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h21)) begin
|
||||
up_pwm_width <= up_wdata_s;
|
||||
up_tacho_en <= 1'b0;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h22)) begin
|
||||
up_tacho_val <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h23)) begin
|
||||
up_tacho_tol <= up_wdata_s;
|
||||
up_tacho_en <= 1'b1;
|
||||
end else if (temp_increase_alarm) begin
|
||||
up_tacho_en <= 1'b0;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h40)) begin
|
||||
up_temp_00_h <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h41)) begin
|
||||
up_temp_25_l <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h42)) begin
|
||||
up_temp_25_h <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h43)) begin
|
||||
up_temp_50_l <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h44)) begin
|
||||
up_temp_50_h <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h45)) begin
|
||||
up_temp_75_l <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h46)) begin
|
||||
up_temp_75_h <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h47)) begin
|
||||
up_temp_100_l <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h50)) begin
|
||||
up_tacho_25 <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h51)) begin
|
||||
up_tacho_50 <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h52)) begin
|
||||
up_tacho_75 <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h53)) begin
|
||||
up_tacho_100 <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h54)) begin
|
||||
up_tacho_25_tol <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h55)) begin
|
||||
up_tacho_50_tol <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h56)) begin
|
||||
up_tacho_75_tol <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h57)) begin
|
||||
up_tacho_100_tol <= up_wdata_s;
|
||||
end
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h10)) begin
|
||||
up_irq_mask <= up_wdata_s[3:0];
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//writing reset
|
||||
always @(posedge up_clk) begin
|
||||
if (s_axi_aresetn == 1'b0) begin
|
||||
up_wack <= 'd0;
|
||||
up_resetn <= 1'd0;
|
||||
end else begin
|
||||
up_wack <= up_wreq_s;
|
||||
if ((up_wreq_s == 1'b1) && (up_waddr_s == 8'h20)) begin
|
||||
up_resetn <= up_wdata_s[0];
|
||||
end else begin
|
||||
up_resetn <= 1'd1;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//axi registers read
|
||||
always @(posedge up_clk) begin
|
||||
if (s_axi_aresetn == 1'b0) begin
|
||||
up_rack <= 'd0;
|
||||
up_rdata <= 'd0;
|
||||
end else begin
|
||||
up_rack <= up_rreq_s;
|
||||
if (up_rreq_s == 1'b1) begin
|
||||
case (up_raddr_s)
|
||||
8'h00: up_rdata <= CORE_VERSION;
|
||||
8'h01: up_rdata <= ID;
|
||||
8'h02: up_rdata <= up_scratch;
|
||||
8'h03: up_rdata <= CORE_MAGIC;
|
||||
8'h10: up_rdata <= up_irq_mask;
|
||||
8'h11: up_rdata <= up_irq_pending;
|
||||
8'h12: up_rdata <= up_irq_source;
|
||||
8'h20: up_rdata <= up_resetn;
|
||||
8'h21: up_rdata <= pwm_width;
|
||||
8'h22: up_rdata <= up_tacho_val;
|
||||
8'h23: up_rdata <= up_tacho_tol;
|
||||
8'h24: up_rdata <= INTERNAL_SYSMONE;
|
||||
8'h30: up_rdata <= PWM_PERIOD;
|
||||
8'h31: up_rdata <= up_tacho_avg_sum;
|
||||
8'h32: up_rdata <= sysmone_temp;
|
||||
8'h40: up_rdata <= up_temp_00_h;
|
||||
8'h41: up_rdata <= up_temp_25_l;
|
||||
8'h42: up_rdata <= up_temp_25_h;
|
||||
8'h43: up_rdata <= up_temp_50_l;
|
||||
8'h44: up_rdata <= up_temp_50_h;
|
||||
8'h45: up_rdata <= up_temp_75_l;
|
||||
8'h46: up_rdata <= up_temp_75_h;
|
||||
8'h47: up_rdata <= up_temp_100_l;
|
||||
8'h50: up_rdata <= up_tacho_25;
|
||||
8'h51: up_rdata <= up_tacho_50;
|
||||
8'h52: up_rdata <= up_tacho_75;
|
||||
8'h53: up_rdata <= up_tacho_100;
|
||||
8'h54: up_rdata <= up_tacho_25_tol;
|
||||
8'h55: up_rdata <= up_tacho_50_tol;
|
||||
8'h56: up_rdata <= up_tacho_75_tol;
|
||||
8'h57: up_rdata <= up_tacho_100_tol;
|
||||
default: up_rdata <= 0;
|
||||
endcase
|
||||
end else begin
|
||||
up_rdata <= 32'd0;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//IRQ handling
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
irq <= 1'b0;
|
||||
end else begin
|
||||
irq <= |up_irq_pending;
|
||||
end
|
||||
end
|
||||
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
up_irq_source <= 4'b0000;
|
||||
end else begin
|
||||
up_irq_source <= up_irq_trigger | (up_irq_source & ~up_irq_source_clear);
|
||||
end
|
||||
end
|
||||
|
||||
//tacho measurement logic
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
tacho_edge_det <= 'h0;
|
||||
tacho_meas <= 'h0;
|
||||
tacho_meas_new <= 'h0;
|
||||
tacho_delayed <= 'h0;
|
||||
end else begin
|
||||
//edge detection of tacho signal
|
||||
tacho_delayed <= tacho;
|
||||
tacho_edge_det <= tacho & ~tacho_delayed;
|
||||
if ((tacho_edge_det == 1'b1) && (pwm_change_done)) begin
|
||||
//measurement is recorded
|
||||
tacho_meas <= counter_reg;
|
||||
//signal indicates new measurement completed
|
||||
tacho_meas_new <= 1'b1;
|
||||
end else if(tacho_meas_ack == 1'b1) begin
|
||||
//acknowledge received from state machine
|
||||
//resetting new measurement flag
|
||||
tacho_meas_new <= 'h0;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//pwm change proc
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
pwm_change_done <= 1'b1;
|
||||
end else if (counter_overflow) begin
|
||||
pwm_change_done <= 1'b1;
|
||||
end else if (pulse_gen_load_config) begin
|
||||
pwm_change_done <= 'h0;
|
||||
end
|
||||
end
|
||||
|
||||
//tacho measurement and pwm change delay counter
|
||||
always @(posedge up_clk) begin
|
||||
if ((up_resetn & counter_resetn) == 1'b0) begin
|
||||
counter_reg <= 'h0;
|
||||
counter_overflow <= 1'b0;
|
||||
end else begin
|
||||
if (counter_reg == OVERFLOW_LIM) begin
|
||||
counter_reg <= 'h0;
|
||||
counter_overflow <= 1'b1;
|
||||
end else begin
|
||||
counter_reg <= counter_reg + 1'b1;
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
//prescaler; sets the rate at which the fsm is run
|
||||
always @(posedge up_clk) begin
|
||||
if (up_resetn == 1'b0) begin
|
||||
presc_reg <= 'h0;
|
||||
end else begin
|
||||
if (presc_reg == 'h8000) begin
|
||||
presc_reg <= 'h0;
|
||||
end else begin
|
||||
presc_reg <= presc_reg + 1'b1;
|
||||
end
|
||||
end
|
||||
end
|
||||
endmodule
|
||||
@@ -0,0 +1,413 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- Product Version: Vivado v2023.2.1 (64-bit) -->
|
||||
<!-- -->
|
||||
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
|
||||
<!-- Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. -->
|
||||
|
||||
<Project Product="Vivado" Version="7" Minor="65" Path="/home/josh/tmp/hdl/library/axi_fan_control/axi_fan_control.xpr">
|
||||
<DefaultLaunch Dir="$PRUNDIR"/>
|
||||
<Configuration>
|
||||
<Option Name="Id" Val="62683cefe9ac4e41bf9fb77c886a5c9a"/>
|
||||
<Option Name="Part" Val="xc7vx485tffg1157-1"/>
|
||||
<Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
|
||||
<Option Name="CompiledLibDirXSim" Val=""/>
|
||||
<Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
|
||||
<Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
|
||||
<Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
|
||||
<Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
|
||||
<Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
|
||||
<Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
|
||||
<Option Name="SimulatorInstallDirModelSim" Val=""/>
|
||||
<Option Name="SimulatorInstallDirQuesta" Val=""/>
|
||||
<Option Name="SimulatorInstallDirXcelium" Val=""/>
|
||||
<Option Name="SimulatorInstallDirVCS" Val=""/>
|
||||
<Option Name="SimulatorInstallDirRiviera" Val=""/>
|
||||
<Option Name="SimulatorInstallDirActiveHdl" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirModelSim" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirQuesta" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirXcelium" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirVCS" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirRiviera" Val=""/>
|
||||
<Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
|
||||
<Option Name="SimulatorVersionXsim" Val="2023.2"/>
|
||||
<Option Name="SimulatorVersionModelSim" Val="2023.2"/>
|
||||
<Option Name="SimulatorVersionQuesta" Val="2023.2"/>
|
||||
<Option Name="SimulatorVersionXcelium" Val="23.03.002"/>
|
||||
<Option Name="SimulatorVersionVCS" Val="U-2023.03-1"/>
|
||||
<Option Name="SimulatorVersionRiviera" Val="2022.10"/>
|
||||
<Option Name="SimulatorVersionActiveHdl" Val="14.1"/>
|
||||
<Option Name="SimulatorGccVersionXsim" Val="9.3.0"/>
|
||||
<Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
|
||||
<Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
|
||||
<Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
|
||||
<Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
|
||||
<Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
|
||||
<Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
|
||||
<Option Name="BoardPart" Val=""/>
|
||||
<Option Name="ActiveSimSet" Val="sim_1"/>
|
||||
<Option Name="DefaultLib" Val="xil_defaultlib"/>
|
||||
<Option Name="ProjectType" Val="Default"/>
|
||||
<Option Name="IPRepoPath" Val="$PPRDIR/../../library"/>
|
||||
<Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
|
||||
<Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
|
||||
<Option Name="IPCachePermission" Val="read"/>
|
||||
<Option Name="IPCachePermission" Val="write"/>
|
||||
<Option Name="EnableCoreContainer" Val="FALSE"/>
|
||||
<Option Name="EnableResourceEstimation" Val="FALSE"/>
|
||||
<Option Name="SimCompileState" Val="TRUE"/>
|
||||
<Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
|
||||
<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
|
||||
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
|
||||
<Option Name="EnableBDX" Val="FALSE"/>
|
||||
<Option Name="FeatureSet" Val="FeatureSet_Classic"/>
|
||||
<Option Name="WTXSimLaunchSim" Val="0"/>
|
||||
<Option Name="WTModelSimLaunchSim" Val="0"/>
|
||||
<Option Name="WTQuestaLaunchSim" Val="0"/>
|
||||
<Option Name="WTIesLaunchSim" Val="0"/>
|
||||
<Option Name="WTVcsLaunchSim" Val="0"/>
|
||||
<Option Name="WTRivieraLaunchSim" Val="0"/>
|
||||
<Option Name="WTActivehdlLaunchSim" Val="0"/>
|
||||
<Option Name="WTXSimExportSim" Val="0"/>
|
||||
<Option Name="WTModelSimExportSim" Val="0"/>
|
||||
<Option Name="WTQuestaExportSim" Val="0"/>
|
||||
<Option Name="WTIesExportSim" Val="0"/>
|
||||
<Option Name="WTVcsExportSim" Val="0"/>
|
||||
<Option Name="WTRivieraExportSim" Val="0"/>
|
||||
<Option Name="WTActivehdlExportSim" Val="0"/>
|
||||
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
|
||||
<Option Name="XSimRadix" Val="hex"/>
|
||||
<Option Name="XSimTimeUnit" Val="ns"/>
|
||||
<Option Name="XSimArrayDisplayLimit" Val="1024"/>
|
||||
<Option Name="XSimTraceLimit" Val="65536"/>
|
||||
<Option Name="SimTypes" Val="rtl"/>
|
||||
<Option Name="SimTypes" Val="bfm"/>
|
||||
<Option Name="SimTypes" Val="tlm"/>
|
||||
<Option Name="SimTypes" Val="tlm_dpi"/>
|
||||
<Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
|
||||
<Option Name="DcpsUptoDate" Val="TRUE"/>
|
||||
<Option Name="ClassicSocBoot" Val="FALSE"/>
|
||||
<Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
|
||||
</Configuration>
|
||||
<FileSets Version="1" Minor="32">
|
||||
<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
|
||||
<Filter Type="Srcs"/>
|
||||
<File Path="$PPRDIR/../common/up_axi.v">
|
||||
<FileInfo>
|
||||
<Attr Name="UsedIn" Val="synthesis"/>
|
||||
<Attr Name="UsedIn" Val="implementation"/>
|
||||
<Attr Name="UsedIn" Val="simulation"/>
|
||||
</FileInfo>
|
||||
</File>
|
||||
<File Path="$PPRDIR/../common/util_pulse_gen.v">
|
||||
<FileInfo>
|
||||
<Attr Name="UsedIn" Val="synthesis"/>
|
||||
<Attr Name="UsedIn" Val="implementation"/>
|
||||
<Attr Name="UsedIn" Val="simulation"/>
|
||||
</FileInfo>
|
||||
</File>
|
||||
<File Path="$PPRDIR/axi_fan_control.v">
|
||||
<FileInfo>
|
||||
<Attr Name="UsedIn" Val="synthesis"/>
|
||||
<Attr Name="UsedIn" Val="implementation"/>
|
||||
<Attr Name="UsedIn" Val="simulation"/>
|
||||
</FileInfo>
|
||||
</File>
|
||||
<File Path="$PPRDIR/component.xml">
|
||||
<FileInfo SFType="IPXACT"/>
|
||||
</File>
|
||||
<Config>
|
||||
<Option Name="DesignMode" Val="RTL"/>
|
||||
<Option Name="TopModule" Val="axi_fan_control"/>
|
||||
</Config>
|
||||
</FileSet>
|
||||
<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
|
||||
<Filter Type="Constrs"/>
|
||||
<Config>
|
||||
<Option Name="ConstrsType" Val="XDC"/>
|
||||
</Config>
|
||||
</FileSet>
|
||||
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
|
||||
<Config>
|
||||
<Option Name="DesignMode" Val="RTL"/>
|
||||
<Option Name="TopAutoSet" Val="TRUE"/>
|
||||
<Option Name="TransportPathDelay" Val="0"/>
|
||||
<Option Name="TransportIntDelay" Val="0"/>
|
||||
<Option Name="SelectedSimModel" Val="rtl"/>
|
||||
<Option Name="PamDesignTestbench" Val=""/>
|
||||
<Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
|
||||
<Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
|
||||
<Option Name="PamPseudoTop" Val="pseudo_tb"/>
|
||||
<Option Name="SrcSet" Val="sources_1"/>
|
||||
</Config>
|
||||
</FileSet>
|
||||
<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
|
||||
<Filter Type="Utils"/>
|
||||
<Config>
|
||||
<Option Name="TopAutoSet" Val="TRUE"/>
|
||||
</Config>
|
||||
</FileSet>
|
||||
</FileSets>
|
||||
<Simulators>
|
||||
<Simulator Name="XSim">
|
||||
<Option Name="Description" Val="Vivado Simulator"/>
|
||||
<Option Name="CompiledLib" Val="0"/>
|
||||
</Simulator>
|
||||
<Simulator Name="ModelSim">
|
||||
<Option Name="Description" Val="ModelSim Simulator"/>
|
||||
</Simulator>
|
||||
<Simulator Name="Questa">
|
||||
<Option Name="Description" Val="Questa Advanced Simulator"/>
|
||||
</Simulator>
|
||||
<Simulator Name="Xcelium">
|
||||
<Option Name="Description" Val="Xcelium Parallel Simulator"/>
|
||||
</Simulator>
|
||||
<Simulator Name="VCS">
|
||||
<Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
|
||||
</Simulator>
|
||||
<Simulator Name="Riviera">
|
||||
<Option Name="Description" Val="Riviera-PRO Simulator"/>
|
||||
</Simulator>
|
||||
</Simulators>
|
||||
<Runs Version="1" Minor="21">
|
||||
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7vx485tffg1157-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
|
||||
<Strategy Version="1" Minor="2">
|
||||
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2023">
|
||||
<Desc>Vivado Synthesis Defaults</Desc>
|
||||
</StratHandle>
|
||||
<Step Id="synth_design"/>
|
||||
</Strategy>
|
||||
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2023"/>
|
||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7vx485tffg1157-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
|
||||
<Strategy Version="1" Minor="2">
|
||||
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023">
|
||||
<Desc>Default settings for Implementation.</Desc>
|
||||
</StratHandle>
|
||||
<Step Id="init_design"/>
|
||||
<Step Id="opt_design"/>
|
||||
<Step Id="power_opt_design"/>
|
||||
<Step Id="place_design"/>
|
||||
<Step Id="post_place_power_opt_design"/>
|
||||
<Step Id="phys_opt_design"/>
|
||||
<Step Id="route_design"/>
|
||||
<Step Id="post_route_phys_opt_design"/>
|
||||
<Step Id="write_bitstream"/>
|
||||
</Strategy>
|
||||
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2023"/>
|
||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
</Runs>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val="Vivado 12-1790"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="1"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
<MsgAttr Name="StringsToMatch" Val="Evaluation"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="features"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="should"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="NOT"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="be"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="used"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="in"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="production"/>
|
||||
<MsgAttr Name="StringsToMatch" Val="systems."/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="INFO"/>
|
||||
<MsgAttr Name="Id" Val="Designutils 20-3303"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="10"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
<MsgAttr Name="StringsToMatch" Val="HDPYFinalizeIO"/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val="Place 30-73"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="11"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
<MsgAttr Name="StringsToMatch" Val="axi_spi"/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val=""/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="12"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
<MsgAttr Name="StringsToMatch" Val="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY"/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val="BD 41-1343"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="2"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val="BD 41-1306"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="3"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="ERROR"/>
|
||||
<MsgAttr Name="Id" Val="BD 41-1276"/>
|
||||
<MsgAttr Name="Severity" Val="CRITICAL WARNING"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="4"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="INFO"/>
|
||||
<MsgAttr Name="Id" Val="IP_Flow 19-3656"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="5"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="INFO"/>
|
||||
<MsgAttr Name="Id" Val="IP_Flow 19-4623"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="6"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="INFO"/>
|
||||
<MsgAttr Name="Id" Val="IP_Flow 19-459"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="7"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="INFO"/>
|
||||
<MsgAttr Name="Id" Val="Synth 8-3331"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="8"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<MsgRule>
|
||||
<MsgAttr Name="RuleType" Val="1"/>
|
||||
<MsgAttr Name="Limit" Val="-1"/>
|
||||
<MsgAttr Name="NewSeverity" Val="WARNING"/>
|
||||
<MsgAttr Name="Id" Val="Synth 8-2490"/>
|
||||
<MsgAttr Name="Severity" Val="ANY"/>
|
||||
<MsgAttr Name="ShowRule" Val="1"/>
|
||||
<MsgAttr Name="RuleSource" Val="2"/>
|
||||
<MsgAttr Name="StringIsRegExp" Val="0"/>
|
||||
<MsgAttr Name="RuleId" Val="9"/>
|
||||
<MsgAttr Name="Note" Val=""/>
|
||||
<MsgAttr Name="Author" Val=""/>
|
||||
<MsgAttr Name="CreatedTimestamp" Val=""/>
|
||||
</MsgRule>
|
||||
<Board/>
|
||||
<DashboardSummary Version="1" Minor="0">
|
||||
<Dashboards>
|
||||
<Dashboard Name="default_dashboard">
|
||||
<Gadgets>
|
||||
<Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
|
||||
<GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
|
||||
<GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
|
||||
</Gadget>
|
||||
<Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
|
||||
</Gadget>
|
||||
</Gadgets>
|
||||
</Dashboard>
|
||||
<CurrentDashboard>default_dashboard</CurrentDashboard>
|
||||
</Dashboards>
|
||||
</DashboardSummary>
|
||||
</Project>
|
||||
@@ -0,0 +1,22 @@
|
||||
###############################################################################
|
||||
## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
|
||||
### SPDX short identifier: ADIBSD
|
||||
###############################################################################
|
||||
|
||||
# ip
|
||||
source ../../scripts/adi_env.tcl
|
||||
source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
|
||||
|
||||
adi_ip_create axi_fan_control
|
||||
adi_ip_files axi_fan_control [list \
|
||||
"$ad_hdl_dir/library/common/up_axi.v" \
|
||||
"$ad_hdl_dir/library/common/util_pulse_gen.v" \
|
||||
"axi_fan_control.v"]
|
||||
|
||||
adi_ip_properties axi_fan_control
|
||||
|
||||
set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_fan_control} [ipx::current_core]
|
||||
|
||||
set cc [ipx::current_core]
|
||||
|
||||
ipx::save_core $cc
|
||||
@@ -0,0 +1,956 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<spirit:vendor>analog.com</spirit:vendor>
|
||||
<spirit:library>user</spirit:library>
|
||||
<spirit:name>axi_fan_control</spirit:name>
|
||||
<spirit:version>1.0</spirit:version>
|
||||
<spirit:busInterfaces>
|
||||
<spirit:busInterface>
|
||||
<spirit:name>s_axi</spirit:name>
|
||||
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
|
||||
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
|
||||
<spirit:slave>
|
||||
<spirit:memoryMapRef spirit:memoryMapRef="s_axi"/>
|
||||
</spirit:slave>
|
||||
<spirit:portMaps>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>AWADDR</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_awaddr</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>AWPROT</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_awprot</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>AWVALID</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_awvalid</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>AWREADY</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_awready</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>WDATA</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_wdata</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>WSTRB</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_wstrb</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>WVALID</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_wvalid</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>WREADY</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_wready</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>BRESP</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_bresp</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>BVALID</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_bvalid</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>BREADY</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_bready</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>ARADDR</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_araddr</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>ARPROT</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_arprot</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>ARVALID</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_arvalid</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>ARREADY</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_arready</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>RDATA</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_rdata</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>RRESP</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_rresp</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>RVALID</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_rvalid</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>RREADY</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_rready</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
</spirit:portMaps>
|
||||
</spirit:busInterface>
|
||||
<spirit:busInterface>
|
||||
<spirit:name>s_axi_aclk</spirit:name>
|
||||
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
|
||||
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
|
||||
<spirit:slave/>
|
||||
<spirit:portMaps>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>CLK</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_aclk</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
</spirit:portMaps>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
|
||||
<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_BUSIF">s_axi</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>ASSOCIATED_RESET</spirit:name>
|
||||
<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
</spirit:busInterface>
|
||||
<spirit:busInterface>
|
||||
<spirit:name>s_axi_aresetn</spirit:name>
|
||||
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
|
||||
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
|
||||
<spirit:slave/>
|
||||
<spirit:portMaps>
|
||||
<spirit:portMap>
|
||||
<spirit:logicalPort>
|
||||
<spirit:name>RST</spirit:name>
|
||||
</spirit:logicalPort>
|
||||
<spirit:physicalPort>
|
||||
<spirit:name>s_axi_aresetn</spirit:name>
|
||||
</spirit:physicalPort>
|
||||
</spirit:portMap>
|
||||
</spirit:portMaps>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>POLARITY</spirit:name>
|
||||
<spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
</spirit:busInterface>
|
||||
</spirit:busInterfaces>
|
||||
<spirit:memoryMaps>
|
||||
<spirit:memoryMap>
|
||||
<spirit:name>s_axi</spirit:name>
|
||||
<spirit:addressBlock>
|
||||
<spirit:name>axi_lite</spirit:name>
|
||||
<spirit:baseAddress spirit:format="long">0</spirit:baseAddress>
|
||||
<spirit:range spirit:format="long">65536</spirit:range>
|
||||
<spirit:width spirit:format="long">0</spirit:width>
|
||||
</spirit:addressBlock>
|
||||
</spirit:memoryMap>
|
||||
</spirit:memoryMaps>
|
||||
<spirit:model>
|
||||
<spirit:views>
|
||||
<spirit:view>
|
||||
<spirit:name>xilinx_anylanguagesynthesis</spirit:name>
|
||||
<spirit:displayName>Synthesis</spirit:displayName>
|
||||
<spirit:envIdentifier>:vivado.xilinx.com:synthesis</spirit:envIdentifier>
|
||||
<spirit:language>Verilog</spirit:language>
|
||||
<spirit:modelName>axi_fan_control</spirit:modelName>
|
||||
<spirit:fileSetRef>
|
||||
<spirit:localName>xilinx_anylanguagesynthesis_view_fileset</spirit:localName>
|
||||
</spirit:fileSetRef>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>viewChecksum</spirit:name>
|
||||
<spirit:value>5cc2597a</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
</spirit:view>
|
||||
<spirit:view>
|
||||
<spirit:name>xilinx_anylanguagebehavioralsimulation</spirit:name>
|
||||
<spirit:displayName>Simulation</spirit:displayName>
|
||||
<spirit:envIdentifier>:vivado.xilinx.com:simulation</spirit:envIdentifier>
|
||||
<spirit:language>Verilog</spirit:language>
|
||||
<spirit:modelName>axi_fan_control</spirit:modelName>
|
||||
<spirit:fileSetRef>
|
||||
<spirit:localName>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:localName>
|
||||
</spirit:fileSetRef>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>viewChecksum</spirit:name>
|
||||
<spirit:value>5cc2597a</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
</spirit:view>
|
||||
<spirit:view>
|
||||
<spirit:name>xilinx_xpgui</spirit:name>
|
||||
<spirit:displayName>UI Layout</spirit:displayName>
|
||||
<spirit:envIdentifier>:vivado.xilinx.com:xgui.ui</spirit:envIdentifier>
|
||||
<spirit:fileSetRef>
|
||||
<spirit:localName>xilinx_xpgui_view_fileset</spirit:localName>
|
||||
</spirit:fileSetRef>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>viewChecksum</spirit:name>
|
||||
<spirit:value>c9d9f988</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
</spirit:view>
|
||||
</spirit:views>
|
||||
<spirit:ports>
|
||||
<spirit:port>
|
||||
<spirit:name>temp_in</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">9</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
</spirit:vector>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:name>tacho</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
<spirit:port>
|
||||
<spirit:name>irq</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>reg</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
</spirit:wireTypeDefs>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>pwm</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_aclk</spirit:name>
|
||||
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|
||||
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|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
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|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
</spirit:wireTypeDefs>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_aresetn</spirit:name>
|
||||
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|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
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|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_awvalid</spirit:name>
|
||||
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|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
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|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
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|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_awaddr</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:left spirit:format="long">15</spirit:left>
|
||||
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|
||||
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|
||||
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|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
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|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_awprot</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">2</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
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|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_awready</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
</spirit:wire>
|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_wvalid</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
</spirit:wire>
|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_wdata</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">31</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
</spirit:wire>
|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_wstrb</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">3</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
</spirit:vector>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_wready</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
</spirit:wire>
|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_bvalid</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
</spirit:wire>
|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_bresp</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">1</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_bready</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
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<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_arvalid</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_araddr</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:left spirit:format="long">15</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
||||
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|
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<spirit:wireTypeDef>
|
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<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
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|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_arprot</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:left spirit:format="long">2</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
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|
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<spirit:wireTypeDef>
|
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<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
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|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_arready</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:wireTypeDefs>
|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
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|
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
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|
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<spirit:port>
|
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<spirit:name>s_axi_rvalid</spirit:name>
|
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<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
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|
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<spirit:wireTypeDef>
|
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<spirit:typeName>std_logic</spirit:typeName>
|
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|
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
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|
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_rresp</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
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|
||||
<spirit:left spirit:format="long">1</spirit:left>
|
||||
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||||
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|
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|
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<spirit:wireTypeDef>
|
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<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
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<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_rdata</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>out</spirit:direction>
|
||||
<spirit:vector>
|
||||
<spirit:left spirit:format="long">31</spirit:left>
|
||||
<spirit:right spirit:format="long">0</spirit:right>
|
||||
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|
||||
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|
||||
<spirit:wireTypeDef>
|
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<spirit:typeName>std_logic_vector</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
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|
||||
</spirit:wireTypeDefs>
|
||||
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|
||||
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|
||||
<spirit:port>
|
||||
<spirit:name>s_axi_rready</spirit:name>
|
||||
<spirit:wire>
|
||||
<spirit:direction>in</spirit:direction>
|
||||
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|
||||
<spirit:wireTypeDef>
|
||||
<spirit:typeName>std_logic</spirit:typeName>
|
||||
<spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
|
||||
<spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
|
||||
</spirit:wireTypeDef>
|
||||
</spirit:wireTypeDefs>
|
||||
<spirit:driver>
|
||||
<spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
|
||||
</spirit:driver>
|
||||
</spirit:wire>
|
||||
</spirit:port>
|
||||
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|
||||
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|
||||
<spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="integer">
|
||||
<spirit:name>ID</spirit:name>
|
||||
<spirit:displayName>Id</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.ID">0</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>PWM_FREQUENCY_HZ</spirit:name>
|
||||
<spirit:displayName>Pwm Frequency Hz</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.PWM_FREQUENCY_HZ">5000</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>INTERNAL_SYSMONE</spirit:name>
|
||||
<spirit:displayName>Internal Sysmone</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.INTERNAL_SYSMONE">0</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>AVG_POW</spirit:name>
|
||||
<spirit:displayName>Avg Pow</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.AVG_POW">7</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TACHO_TOL_PERCENT</spirit:name>
|
||||
<spirit:displayName>Tacho Tol Percent</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TACHO_TOL_PERCENT">25</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TACHO_T25</spirit:name>
|
||||
<spirit:displayName>Tacho T25</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TACHO_T25">1470000</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TACHO_T50</spirit:name>
|
||||
<spirit:displayName>Tacho T50</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TACHO_T50">820000</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TACHO_T75</spirit:name>
|
||||
<spirit:displayName>Tacho T75</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TACHO_T75">480000</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TACHO_T100</spirit:name>
|
||||
<spirit:displayName>Tacho T100</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TACHO_T100">340000</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_00_H</spirit:name>
|
||||
<spirit:displayName>Temp 00 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_00_H">5</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_25_L</spirit:name>
|
||||
<spirit:displayName>Temp 25 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_25_L">20</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_25_H</spirit:name>
|
||||
<spirit:displayName>Temp 25 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_25_H">40</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_50_L</spirit:name>
|
||||
<spirit:displayName>Temp 50 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_50_L">60</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_50_H</spirit:name>
|
||||
<spirit:displayName>Temp 50 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_50_H">70</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_75_L</spirit:name>
|
||||
<spirit:displayName>Temp 75 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_75_L">80</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_75_H</spirit:name>
|
||||
<spirit:displayName>Temp 75 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_75_H">90</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
<spirit:modelParameter spirit:dataType="integer">
|
||||
<spirit:name>TEMP_00_L</spirit:name>
|
||||
<spirit:displayName>Temp 00 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.TEMP_00_L">95</spirit:value>
|
||||
</spirit:modelParameter>
|
||||
</spirit:modelParameters>
|
||||
</spirit:model>
|
||||
<spirit:choices>
|
||||
<spirit:choice>
|
||||
<spirit:name>choice_list_74b5137e</spirit:name>
|
||||
<spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
|
||||
<spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
|
||||
</spirit:choice>
|
||||
</spirit:choices>
|
||||
<spirit:fileSets>
|
||||
<spirit:fileSet>
|
||||
<spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
|
||||
<spirit:file>
|
||||
<spirit:name>../common/up_axi.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
</spirit:file>
|
||||
<spirit:file>
|
||||
<spirit:name>../common/util_pulse_gen.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
</spirit:file>
|
||||
<spirit:file>
|
||||
<spirit:name>axi_fan_control.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
<spirit:userFileType>CHECKSUM_f52f26c6</spirit:userFileType>
|
||||
</spirit:file>
|
||||
</spirit:fileSet>
|
||||
<spirit:fileSet>
|
||||
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
|
||||
<spirit:file>
|
||||
<spirit:name>../common/up_axi.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
</spirit:file>
|
||||
<spirit:file>
|
||||
<spirit:name>../common/util_pulse_gen.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
</spirit:file>
|
||||
<spirit:file>
|
||||
<spirit:name>axi_fan_control.v</spirit:name>
|
||||
<spirit:fileType>verilogSource</spirit:fileType>
|
||||
</spirit:file>
|
||||
</spirit:fileSet>
|
||||
<spirit:fileSet>
|
||||
<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
|
||||
<spirit:file>
|
||||
<spirit:name>xgui/axi_fan_control_v1_0.tcl</spirit:name>
|
||||
<spirit:fileType>tclSource</spirit:fileType>
|
||||
<spirit:userFileType>CHECKSUM_c9d9f988</spirit:userFileType>
|
||||
<spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
|
||||
</spirit:file>
|
||||
</spirit:fileSet>
|
||||
</spirit:fileSets>
|
||||
<spirit:description>axi_fan_control_v1_0</spirit:description>
|
||||
<spirit:parameters>
|
||||
<spirit:parameter>
|
||||
<spirit:name>ID</spirit:name>
|
||||
<spirit:displayName>Id</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.ID">0</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>PWM_FREQUENCY_HZ</spirit:name>
|
||||
<spirit:displayName>Pwm Frequency Hz</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PWM_FREQUENCY_HZ">5000</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>INTERNAL_SYSMONE</spirit:name>
|
||||
<spirit:displayName>Internal Sysmone</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.INTERNAL_SYSMONE">0</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>AVG_POW</spirit:name>
|
||||
<spirit:displayName>Avg Pow</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AVG_POW">7</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TACHO_TOL_PERCENT</spirit:name>
|
||||
<spirit:displayName>Tacho Tol Percent</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TACHO_TOL_PERCENT">25</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TACHO_T25</spirit:name>
|
||||
<spirit:displayName>Tacho T25</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TACHO_T25">1470000</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TACHO_T50</spirit:name>
|
||||
<spirit:displayName>Tacho T50</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TACHO_T50">820000</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TACHO_T75</spirit:name>
|
||||
<spirit:displayName>Tacho T75</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TACHO_T75">480000</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TACHO_T100</spirit:name>
|
||||
<spirit:displayName>Tacho T100</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TACHO_T100">340000</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_00_H</spirit:name>
|
||||
<spirit:displayName>Temp 00 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_00_H">5</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_25_L</spirit:name>
|
||||
<spirit:displayName>Temp 25 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_25_L">20</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_25_H</spirit:name>
|
||||
<spirit:displayName>Temp 25 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_25_H">40</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_50_L</spirit:name>
|
||||
<spirit:displayName>Temp 50 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_50_L">60</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_50_H</spirit:name>
|
||||
<spirit:displayName>Temp 50 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_50_H">70</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_75_L</spirit:name>
|
||||
<spirit:displayName>Temp 75 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_75_L">80</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_75_H</spirit:name>
|
||||
<spirit:displayName>Temp 75 H</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_75_H">90</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>TEMP_00_L</spirit:name>
|
||||
<spirit:displayName>Temp 00 L</spirit:displayName>
|
||||
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.TEMP_00_L">95</spirit:value>
|
||||
</spirit:parameter>
|
||||
<spirit:parameter>
|
||||
<spirit:name>Component_Name</spirit:name>
|
||||
<spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">axi_fan_control_v1_0</spirit:value>
|
||||
</spirit:parameter>
|
||||
</spirit:parameters>
|
||||
<spirit:vendorExtensions>
|
||||
<xilinx:coreExtensions>
|
||||
<xilinx:supportedFamilies>
|
||||
<xilinx:family xilinx:lifeCycle="Production">virtex7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">qvirtex7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">versal</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">kintex7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">kintex7l</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">qkintex7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">qkintex7l</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">akintex7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">artix7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">artix7l</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">aartix7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">qartix7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">zynq</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">qzynq</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">azynq</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">spartan7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">aspartan7</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">virtexu</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">zynquplus</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">virtexuplus</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">virtexuplusHBM</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">virtexuplus58g</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">kintexuplus</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">artixuplus</xilinx:family>
|
||||
<xilinx:family xilinx:lifeCycle="Production">kintexu</xilinx:family>
|
||||
</xilinx:supportedFamilies>
|
||||
<xilinx:taxonomies>
|
||||
<xilinx:taxonomy>/Analog_Devices</xilinx:taxonomy>
|
||||
</xilinx:taxonomies>
|
||||
<xilinx:displayName>axi_fan_control_v1_0</xilinx:displayName>
|
||||
<xilinx:autoFamilySupportLevel>level_2</xilinx:autoFamilySupportLevel>
|
||||
<xilinx:definitionSource>package_project</xilinx:definitionSource>
|
||||
<xilinx:vendorDisplayName>Analog Devices</xilinx:vendorDisplayName>
|
||||
<xilinx:vendorURL>https://wiki.analog.com/resources/fpga/docs/axi_fan_control</xilinx:vendorURL>
|
||||
<xilinx:coreRevision>1</xilinx:coreRevision>
|
||||
<xilinx:coreCreationDateTime>2024-01-14T03:46:18Z</xilinx:coreCreationDateTime>
|
||||
</xilinx:coreExtensions>
|
||||
<xilinx:packagingInfo>
|
||||
<xilinx:xilinxVersion>2023.2.1</xilinx:xilinxVersion>
|
||||
<xilinx:checksum xilinx:scope="fileGroups" xilinx:value="75044ed6"/>
|
||||
<xilinx:checksum xilinx:scope="ports" xilinx:value="e4cef4e9"/>
|
||||
<xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="e84e4824"/>
|
||||
<xilinx:checksum xilinx:scope="parameters" xilinx:value="0a4565b9"/>
|
||||
</xilinx:packagingInfo>
|
||||
</spirit:vendorExtensions>
|
||||
</spirit:component>
|
||||
@@ -0,0 +1,8 @@
|
||||
===============
|
||||
AXI Fan Control
|
||||
===============
|
||||
|
||||
Fan controller IP core
|
||||
|
||||
Link to `wiki-page
|
||||
<https://wiki.analog.com/resources/fpga/docs/axi_fan_control>`_
|
||||
@@ -0,0 +1,265 @@
|
||||
# Definitional proc to organize widgets for parameters.
|
||||
proc init_gui { IPINST } {
|
||||
ipgui::add_param $IPINST -name "Component_Name"
|
||||
#Adding Page
|
||||
set Page_0 [ipgui::add_page $IPINST -name "Page 0"]
|
||||
ipgui::add_param $IPINST -name "AVG_POW" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "ID" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "INTERNAL_SYSMONE" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "PWM_FREQUENCY_HZ" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TACHO_T100" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TACHO_T25" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TACHO_T50" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TACHO_T75" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TACHO_TOL_PERCENT" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_00_H" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_00_L" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_25_H" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_25_L" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_50_H" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_50_L" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_75_H" -parent ${Page_0}
|
||||
ipgui::add_param $IPINST -name "TEMP_75_L" -parent ${Page_0}
|
||||
|
||||
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.AVG_POW { PARAM_VALUE.AVG_POW } {
|
||||
# Procedure called to update AVG_POW when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.AVG_POW { PARAM_VALUE.AVG_POW } {
|
||||
# Procedure called to validate AVG_POW
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.ID { PARAM_VALUE.ID } {
|
||||
# Procedure called to update ID when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.ID { PARAM_VALUE.ID } {
|
||||
# Procedure called to validate ID
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.INTERNAL_SYSMONE { PARAM_VALUE.INTERNAL_SYSMONE } {
|
||||
# Procedure called to update INTERNAL_SYSMONE when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.INTERNAL_SYSMONE { PARAM_VALUE.INTERNAL_SYSMONE } {
|
||||
# Procedure called to validate INTERNAL_SYSMONE
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.PWM_FREQUENCY_HZ { PARAM_VALUE.PWM_FREQUENCY_HZ } {
|
||||
# Procedure called to update PWM_FREQUENCY_HZ when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.PWM_FREQUENCY_HZ { PARAM_VALUE.PWM_FREQUENCY_HZ } {
|
||||
# Procedure called to validate PWM_FREQUENCY_HZ
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TACHO_T100 { PARAM_VALUE.TACHO_T100 } {
|
||||
# Procedure called to update TACHO_T100 when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TACHO_T100 { PARAM_VALUE.TACHO_T100 } {
|
||||
# Procedure called to validate TACHO_T100
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TACHO_T25 { PARAM_VALUE.TACHO_T25 } {
|
||||
# Procedure called to update TACHO_T25 when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TACHO_T25 { PARAM_VALUE.TACHO_T25 } {
|
||||
# Procedure called to validate TACHO_T25
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TACHO_T50 { PARAM_VALUE.TACHO_T50 } {
|
||||
# Procedure called to update TACHO_T50 when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TACHO_T50 { PARAM_VALUE.TACHO_T50 } {
|
||||
# Procedure called to validate TACHO_T50
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TACHO_T75 { PARAM_VALUE.TACHO_T75 } {
|
||||
# Procedure called to update TACHO_T75 when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TACHO_T75 { PARAM_VALUE.TACHO_T75 } {
|
||||
# Procedure called to validate TACHO_T75
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TACHO_TOL_PERCENT { PARAM_VALUE.TACHO_TOL_PERCENT } {
|
||||
# Procedure called to update TACHO_TOL_PERCENT when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TACHO_TOL_PERCENT { PARAM_VALUE.TACHO_TOL_PERCENT } {
|
||||
# Procedure called to validate TACHO_TOL_PERCENT
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_00_H { PARAM_VALUE.TEMP_00_H } {
|
||||
# Procedure called to update TEMP_00_H when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_00_H { PARAM_VALUE.TEMP_00_H } {
|
||||
# Procedure called to validate TEMP_00_H
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_00_L { PARAM_VALUE.TEMP_00_L } {
|
||||
# Procedure called to update TEMP_00_L when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_00_L { PARAM_VALUE.TEMP_00_L } {
|
||||
# Procedure called to validate TEMP_00_L
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_25_H { PARAM_VALUE.TEMP_25_H } {
|
||||
# Procedure called to update TEMP_25_H when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_25_H { PARAM_VALUE.TEMP_25_H } {
|
||||
# Procedure called to validate TEMP_25_H
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_25_L { PARAM_VALUE.TEMP_25_L } {
|
||||
# Procedure called to update TEMP_25_L when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_25_L { PARAM_VALUE.TEMP_25_L } {
|
||||
# Procedure called to validate TEMP_25_L
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_50_H { PARAM_VALUE.TEMP_50_H } {
|
||||
# Procedure called to update TEMP_50_H when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_50_H { PARAM_VALUE.TEMP_50_H } {
|
||||
# Procedure called to validate TEMP_50_H
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_50_L { PARAM_VALUE.TEMP_50_L } {
|
||||
# Procedure called to update TEMP_50_L when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_50_L { PARAM_VALUE.TEMP_50_L } {
|
||||
# Procedure called to validate TEMP_50_L
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_75_H { PARAM_VALUE.TEMP_75_H } {
|
||||
# Procedure called to update TEMP_75_H when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_75_H { PARAM_VALUE.TEMP_75_H } {
|
||||
# Procedure called to validate TEMP_75_H
|
||||
return true
|
||||
}
|
||||
|
||||
proc update_PARAM_VALUE.TEMP_75_L { PARAM_VALUE.TEMP_75_L } {
|
||||
# Procedure called to update TEMP_75_L when any of the dependent parameters in the arguments change
|
||||
}
|
||||
|
||||
proc validate_PARAM_VALUE.TEMP_75_L { PARAM_VALUE.TEMP_75_L } {
|
||||
# Procedure called to validate TEMP_75_L
|
||||
return true
|
||||
}
|
||||
|
||||
|
||||
proc update_MODELPARAM_VALUE.ID { MODELPARAM_VALUE.ID PARAM_VALUE.ID } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.ID}] ${MODELPARAM_VALUE.ID}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.PWM_FREQUENCY_HZ { MODELPARAM_VALUE.PWM_FREQUENCY_HZ PARAM_VALUE.PWM_FREQUENCY_HZ } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.PWM_FREQUENCY_HZ}] ${MODELPARAM_VALUE.PWM_FREQUENCY_HZ}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.INTERNAL_SYSMONE { MODELPARAM_VALUE.INTERNAL_SYSMONE PARAM_VALUE.INTERNAL_SYSMONE } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.INTERNAL_SYSMONE}] ${MODELPARAM_VALUE.INTERNAL_SYSMONE}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.AVG_POW { MODELPARAM_VALUE.AVG_POW PARAM_VALUE.AVG_POW } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.AVG_POW}] ${MODELPARAM_VALUE.AVG_POW}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TACHO_TOL_PERCENT { MODELPARAM_VALUE.TACHO_TOL_PERCENT PARAM_VALUE.TACHO_TOL_PERCENT } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TACHO_TOL_PERCENT}] ${MODELPARAM_VALUE.TACHO_TOL_PERCENT}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TACHO_T25 { MODELPARAM_VALUE.TACHO_T25 PARAM_VALUE.TACHO_T25 } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TACHO_T25}] ${MODELPARAM_VALUE.TACHO_T25}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TACHO_T50 { MODELPARAM_VALUE.TACHO_T50 PARAM_VALUE.TACHO_T50 } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TACHO_T50}] ${MODELPARAM_VALUE.TACHO_T50}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TACHO_T75 { MODELPARAM_VALUE.TACHO_T75 PARAM_VALUE.TACHO_T75 } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TACHO_T75}] ${MODELPARAM_VALUE.TACHO_T75}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TACHO_T100 { MODELPARAM_VALUE.TACHO_T100 PARAM_VALUE.TACHO_T100 } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TACHO_T100}] ${MODELPARAM_VALUE.TACHO_T100}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_00_H { MODELPARAM_VALUE.TEMP_00_H PARAM_VALUE.TEMP_00_H } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_00_H}] ${MODELPARAM_VALUE.TEMP_00_H}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_25_L { MODELPARAM_VALUE.TEMP_25_L PARAM_VALUE.TEMP_25_L } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_25_L}] ${MODELPARAM_VALUE.TEMP_25_L}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_25_H { MODELPARAM_VALUE.TEMP_25_H PARAM_VALUE.TEMP_25_H } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_25_H}] ${MODELPARAM_VALUE.TEMP_25_H}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_50_L { MODELPARAM_VALUE.TEMP_50_L PARAM_VALUE.TEMP_50_L } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_50_L}] ${MODELPARAM_VALUE.TEMP_50_L}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_50_H { MODELPARAM_VALUE.TEMP_50_H PARAM_VALUE.TEMP_50_H } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_50_H}] ${MODELPARAM_VALUE.TEMP_50_H}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_75_L { MODELPARAM_VALUE.TEMP_75_L PARAM_VALUE.TEMP_75_L } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_75_L}] ${MODELPARAM_VALUE.TEMP_75_L}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_75_H { MODELPARAM_VALUE.TEMP_75_H PARAM_VALUE.TEMP_75_H } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_75_H}] ${MODELPARAM_VALUE.TEMP_75_H}
|
||||
}
|
||||
|
||||
proc update_MODELPARAM_VALUE.TEMP_00_L { MODELPARAM_VALUE.TEMP_00_L PARAM_VALUE.TEMP_00_L } {
|
||||
# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
|
||||
set_property value [get_property value ${PARAM_VALUE.TEMP_00_L}] ${MODELPARAM_VALUE.TEMP_00_L}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user