initial commit, add dds_par module

2024-01-15 09:36:08 +08:00
commit 315a673005
1374 changed files with 465956 additions and 0 deletions
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+####################################################################################
+## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+LIBRARY_NAME := axi_i2s_adi
+
+GENERIC_DEPS += ../common/axi_ctrlif.vhd
+GENERIC_DEPS += ../common/axi_streaming_dma_rx_fifo.vhd
+GENERIC_DEPS += ../common/axi_streaming_dma_tx_fifo.vhd
+GENERIC_DEPS += ../common/dma_fifo.vhd
+GENERIC_DEPS += ../common/pl330_dma_fifo.vhd
+GENERIC_DEPS += axi_i2s_adi.vhd
+GENERIC_DEPS += fifo_synchronizer.vhd
+GENERIC_DEPS += i2s_clkgen.vhd
+GENERIC_DEPS += i2s_controller.vhd
+GENERIC_DEPS += i2s_rx.vhd
+GENERIC_DEPS += i2s_tx.vhd
+
+XILINX_DEPS += axi_i2s_adi_constr.xdc
+XILINX_DEPS += axi_i2s_adi_ip.tcl
+
+XILINX_DEPS += ../axi_i2s_adi/i2s.xml
+XILINX_DEPS += ../axi_i2s_adi/i2s_rtl.xml
+
+include ../scripts/library.mk