initial commit, add dds_par module

This commit is contained in:
2024-01-15 09:36:08 +08:00
commit 315a673005
1374 changed files with 465956 additions and 0 deletions
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####################################################################################
####################################################################################
## Copyright (c) 2018 - 2021 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
####################################################################################
include ../../quiet.mk
M_DEPS := interfaces_ip.tcl
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../scripts/adi_ip_xilinx.tcl
M_VIVADO := vivado -mode batch -source
M_FLIST := *.log
M_FLIST += *.jou
M_FLIST += if_xcvr_cm.xml
M_FLIST += if_xcvr_cm_rtl.xml
M_FLIST += if_xcvr_ch.xml
M_FLIST += if_xcvr_ch_rtl.xml
M_FLIST += if_gt_qpll.xml
M_FLIST += if_gt_qpll_rtl.xml
M_FLIST += if_gt_pll.xml
M_FLIST += if_gt_pll_rtl.xml
M_FLIST += if_gt_rx.xml
M_FLIST += if_gt_rx_rtl.xml
M_FLIST += if_gt_tx.xml
M_FLIST += if_gt_tx_rtl.xml
M_FLIST += if_gt_rx_ksig.xml
M_FLIST += if_gt_rx_ksig_rtl.xml
.PHONY: all xilinx clean clean-all
all: xilinx
xilinx: if_xcvr_cm.xml if_xcvr_cm_rtl.xml if_xcvr_ch.xml if_xcvr_ch_rtl.xml if_gt_qpll.xml if_gt_qpll_rtl.xml if_gt_pll.xml if_gt_pll_rtl.xml if_gt_rx.xml if_gt_rx_rtl.xml if_gt_tx.xml if_gt_tx_rtl.xml if_gt_rx_ksig.xml if_gt_rx_ksig_rtl.xml
clean:clean-all
clean-all:
$(call clean, \
$(M_FLIST), \
interface definitions)
%.xml: $(M_DEPS)
$(call build, \
$(M_VIVADO) interfaces_ip.tcl, \
interfaces_ip.log, \
interface definitions)
####################################################################################
####################################################################################
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>fifo_rd</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:extends spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="fifo_read" spirit:version="1.0"/>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
<spirit:description>FIFO Read Interface</spirit:description>
</spirit:busDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>fifo_rd_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_rd" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>DATA</spirit:logicalName>
<spirit:description>FIFO Read Data</spirit:description>
<spirit:wire>
<spirit:qualifier>
<spirit:isData>true</spirit:isData>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>EN</spirit:logicalName>
<spirit:description>FIFO Read Enable</spirit:description>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>UNDERFLOW</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>VALID</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>XFER_REQ</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>fifo_wr</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:extends spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="fifo_write" spirit:version="1.0"/>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
<spirit:description>FIFO Write Interface</spirit:description>
</spirit:busDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>fifo_wr_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_wr" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>DATA</spirit:logicalName>
<spirit:description/>
<spirit:wire>
<spirit:qualifier>
<spirit:isData>true</spirit:isData>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>EN</spirit:logicalName>
<spirit:description/>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>OVERFLOW</spirit:logicalName>
<spirit:description/>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>SYNC</spirit:logicalName>
<spirit:description/>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>optional</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>XFER_REQ</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_do_ctrl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_do_ctrl_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_do_ctrl" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>request_enable</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>request_valid</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>request_ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>request_length</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>response_measured_length</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>response_eot</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>status_underflow</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>status_overflow</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_do_ctrl_v1_0
`define if_do_ctrl_v1_0
package parameter_structs;
typedef struct packed {
bit portEnabled;
integer portWidth;
}portConfig;
typedef struct packed {
// <typeName> <LogicalName> = {<enablement>, <width>}
portConfig request_length;
portConfig response_measured_length;
}if_do_ctrl_v1_0_port_configuration;
parameter if_do_ctrl_v1_0_port_configuration if_do_ctrl_v1_0_default_port_configuration = '{request_length:'{1, -1}, response_measured_length:'{1, -1}};
endpackage
interface if_do_ctrl_v1_0 #(parameter_structs::if_do_ctrl_v1_0_port_configuration port_configuration)();
logic request_enable; //
logic request_valid; //
logic request_ready; //
logic [port_configuration.request_length.portWidth-1:0] request_length; //
logic [port_configuration.response_measured_length.portWidth-1:0] response_measured_length; //
logic response_eot; //
logic status_underflow; //
logic status_overflow; //
modport MASTER (
input request_ready, response_eot, status_underflow, status_overflow,
output request_enable, request_valid, request_length, response_measured_length
);
modport SLAVE (
input request_enable, request_valid, request_length, response_measured_length,
output request_ready, response_eot, status_underflow, status_overflow
);
modport MONITOR (
input request_enable, request_valid, request_ready, request_length, response_measured_length, response_eot, status_underflow, status_overflow
);
endinterface // if_do_ctrl_v1_0
`endif
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_pll</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_pll_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_gt_pll" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>cpll_rst_m</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>cpll_ref_clk_in</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_gt_pll_v1_0
`define if_gt_pll_v1_0
interface if_gt_pll_v1_0();
logic cpll_rst_m; //
logic cpll_ref_clk_in; //
modport MASTER (
output cpll_rst_m, cpll_ref_clk_in
);
modport SLAVE (
input cpll_rst_m, cpll_ref_clk_in
);
modport MONITOR (
input cpll_rst_m, cpll_ref_clk_in
);
endinterface // if_gt_pll_v1_0
`endif
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_qpll</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_qpll_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_gt_qpll" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>qpll_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>qpll_ref_clk</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
+71
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@@ -0,0 +1,71 @@
// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_gt_qpll_v1_0
`define if_gt_qpll_v1_0
interface if_gt_qpll_v1_0();
logic qpll_rst; //
logic qpll_ref_clk; //
modport MASTER (
output qpll_rst, qpll_ref_clk
);
modport SLAVE (
input qpll_rst, qpll_ref_clk
);
modport MONITOR (
input qpll_rst, qpll_ref_clk
);
endinterface // if_gt_qpll_v1_0
`endif
+11
View File
@@ -0,0 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_rx</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
+11
View File
@@ -0,0 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_rx_ksig</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
@@ -0,0 +1,80 @@
<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_rx_ksig_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_gt_rx_ksig" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>rx_gt_ilas_f</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_ilas_q</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_ilas_a</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_ilas_r</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_cgs_k</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
@@ -0,0 +1,74 @@
// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_gt_rx_ksig_v1_0
`define if_gt_rx_ksig_v1_0
interface if_gt_rx_ksig_v1_0();
logic [3:0] rx_gt_ilas_f; //
logic [3:0] rx_gt_ilas_q; //
logic [3:0] rx_gt_ilas_a; //
logic [3:0] rx_gt_ilas_r; //
logic [3:0] rx_gt_cgs_k; //
modport MASTER (
output rx_gt_ilas_f, rx_gt_ilas_q, rx_gt_ilas_a, rx_gt_ilas_r, rx_gt_cgs_k
);
modport SLAVE (
input rx_gt_ilas_f, rx_gt_ilas_q, rx_gt_ilas_a, rx_gt_ilas_r, rx_gt_cgs_k
);
modport MONITOR (
input rx_gt_ilas_f, rx_gt_ilas_q, rx_gt_ilas_a, rx_gt_ilas_r, rx_gt_cgs_k
);
endinterface // if_gt_rx_ksig_v1_0
`endif
+384
View File
@@ -0,0 +1,384 @@
<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_rx_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_gt_rx" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>rx_p</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_n</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_rst_m</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_pll_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_gt_rst_m</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_pll_locked</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_pll_locked_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_user_ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_user_ready_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_rst_done</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_rst_done_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_out_clk</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_clk</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_sysref</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_sync</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_sof</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_data</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_sof</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_data</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_sysref</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_sync</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rx_ip_rst_done</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
+96
View File
@@ -0,0 +1,96 @@
// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_gt_rx_v1_0
`define if_gt_rx_v1_0
interface if_gt_rx_v1_0();
logic rx_p; //
logic rx_n; //
logic rx_rst; //
logic rx_rst_m; //
logic rx_pll_rst; //
logic rx_gt_rst; //
logic rx_gt_rst_m; //
logic rx_pll_locked; //
logic rx_pll_locked_m; //
logic rx_user_ready; //
logic rx_user_ready_m; //
logic rx_rst_done; //
logic rx_rst_done_m; //
logic rx_out_clk; //
logic rx_clk; //
logic rx_sysref; //
logic rx_sync; //
logic rx_sof; //
logic [31:0] rx_data; //
logic rx_ip_rst; //
logic [3:0] rx_ip_sof; //
logic [31:0] rx_ip_data; //
logic rx_ip_sysref; //
logic rx_ip_sync; //
logic rx_ip_rst_done; //
modport MASTER (
input rx_rst, rx_pll_rst, rx_gt_rst, rx_pll_locked, rx_user_ready, rx_rst_done, rx_out_clk, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sysref, rx_ip_rst_done,
output rx_p, rx_n, rx_rst_m, rx_gt_rst_m, rx_pll_locked_m, rx_user_ready_m, rx_rst_done_m, rx_clk, rx_sysref, rx_ip_sof, rx_ip_data, rx_ip_sync
);
modport SLAVE (
input rx_p, rx_n, rx_rst_m, rx_gt_rst_m, rx_pll_locked_m, rx_user_ready_m, rx_rst_done_m, rx_clk, rx_sysref, rx_ip_sof, rx_ip_data, rx_ip_sync,
output rx_rst, rx_pll_rst, rx_gt_rst, rx_pll_locked, rx_user_ready, rx_rst_done, rx_out_clk, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sysref, rx_ip_rst_done
);
modport MONITOR (
input rx_p, rx_n, rx_rst, rx_rst_m, rx_pll_rst, rx_gt_rst, rx_gt_rst_m, rx_pll_locked, rx_pll_locked_m, rx_user_ready, rx_user_ready_m, rx_rst_done, rx_rst_done_m, rx_out_clk, rx_clk, rx_sysref, rx_sync, rx_sof, rx_data, rx_ip_rst, rx_ip_sof, rx_ip_data, rx_ip_sysref, rx_ip_sync, rx_ip_rst_done
);
endinterface // if_gt_rx_v1_0
`endif
+11
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_tx</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
+356
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_gt_tx_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_gt_tx" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>tx_p</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_n</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_rst_m</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_pll_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_gt_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_gt_rst_m</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_pll_locked</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_pll_locked_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_user_ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_user_ready_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_rst_done</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_rst_done_m</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_out_clk</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_clk</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isClock>true</spirit:isClock>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_sysref</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_sync</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_data</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_ip_rst</spirit:logicalName>
<spirit:wire>
<spirit:qualifier>
<spirit:isReset>true</spirit:isReset>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_ip_data</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>32</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_ip_sysref</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_ip_sync</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_ip_rst_done</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
+94
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_gt_tx_v1_0
`define if_gt_tx_v1_0
interface if_gt_tx_v1_0();
logic tx_p; //
logic tx_n; //
logic tx_rst; //
logic tx_rst_m; //
logic tx_pll_rst; //
logic tx_gt_rst; //
logic tx_gt_rst_m; //
logic tx_pll_locked; //
logic tx_pll_locked_m; //
logic tx_user_ready; //
logic tx_user_ready_m; //
logic tx_rst_done; //
logic tx_rst_done_m; //
logic tx_out_clk; //
logic tx_clk; //
logic tx_sysref; //
logic tx_sync; //
logic [31:0] tx_data; //
logic tx_ip_rst; //
logic [31:0] tx_ip_data; //
logic tx_ip_sysref; //
logic tx_ip_sync; //
logic tx_ip_rst_done; //
modport MASTER (
input tx_p, tx_n, tx_rst, tx_pll_rst, tx_gt_rst, tx_pll_locked, tx_user_ready, tx_rst_done, tx_out_clk, tx_ip_rst, tx_ip_data, tx_ip_sysref, tx_ip_sync, tx_ip_rst_done,
output tx_rst_m, tx_gt_rst_m, tx_pll_locked_m, tx_user_ready_m, tx_rst_done_m, tx_clk, tx_sysref, tx_sync, tx_data
);
modport SLAVE (
input tx_rst_m, tx_gt_rst_m, tx_pll_locked_m, tx_user_ready_m, tx_rst_done_m, tx_clk, tx_sysref, tx_sync, tx_data,
output tx_p, tx_n, tx_rst, tx_pll_rst, tx_gt_rst, tx_pll_locked, tx_user_ready, tx_rst_done, tx_out_clk, tx_ip_rst, tx_ip_data, tx_ip_sysref, tx_ip_sync, tx_ip_rst_done
);
modport MONITOR (
input tx_p, tx_n, tx_rst, tx_rst_m, tx_pll_rst, tx_gt_rst, tx_gt_rst_m, tx_pll_locked, tx_pll_locked_m, tx_user_ready, tx_user_ready_m, tx_rst_done, tx_rst_done_m, tx_out_clk, tx_clk, tx_sysref, tx_sync, tx_data, tx_ip_rst, tx_ip_data, tx_ip_sysref, tx_ip_sync, tx_ip_rst_done
);
endinterface // if_gt_tx_v1_0
`endif
+11
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_xcvr_ch</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
+346
View File
@@ -0,0 +1,346 @@
<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_xcvr_ch_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_xcvr_ch" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>pll_locked</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rst</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>user_ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rst_done</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>prbssel</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>prbsforceerr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>prbscntreset</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>prbserr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>prbslocked</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>lpm_dfe_n</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rate</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>3</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>3</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>sys_clk_sel</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>2</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>2</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>out_clk_sel</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>3</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>3</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_diffctrl</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>4</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_postcursor</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>5</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>5</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>tx_precursor</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>5</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>5</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>enb</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>addr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>12</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>12</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>wr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>wdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>bufstatus</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>2</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>2</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>bufstatus_rst</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
+95
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_xcvr_ch_v1_0
`define if_xcvr_ch_v1_0
interface if_xcvr_ch_v1_0();
logic pll_locked; //
logic rst; //
logic user_ready; //
logic rst_done; //
logic [3:0] prbssel; //
logic prbsforceerr; //
logic prbscntreset; //
logic prbserr; //
logic prbslocked; //
logic lpm_dfe_n; //
logic [2:0] rate; //
logic [1:0] sys_clk_sel; //
logic [2:0] out_clk_sel; //
logic [3:0] tx_diffctrl; //
logic [4:0] tx_postcursor; //
logic [4:0] tx_precursor; //
logic enb; //
logic [11:0] addr; //
logic wr; //
logic [15:0] wdata; //
logic [15:0] rdata; //
logic ready; //
logic [1:0] bufstatus; //
logic bufstatus_rst; //
modport MASTER (
input pll_locked, rst_done, prbserr, prbslocked, rdata, ready,
output rst, user_ready, prbssel, prbsforceerr, prbscntreset, lpm_dfe_n, rate, sys_clk_sel, out_clk_sel, tx_diffctrl, tx_postcursor, tx_precursor, enb, addr, wr, wdata, bufstatus, bufstatus_rst
);
modport SLAVE (
input rst, user_ready, prbssel, prbsforceerr, prbscntreset, lpm_dfe_n, rate, sys_clk_sel, out_clk_sel, tx_diffctrl, tx_postcursor, tx_precursor, enb, addr, wr, wdata, bufstatus, bufstatus_rst,
output pll_locked, rst_done, prbserr, prbslocked, rdata, ready
);
modport MONITOR (
input pll_locked, rst, user_ready, rst_done, prbssel, prbsforceerr, prbscntreset, prbserr, prbslocked, lpm_dfe_n, rate, sys_clk_sel, out_clk_sel, tx_diffctrl, tx_postcursor, tx_precursor, enb, addr, wr, wdata, rdata, ready, bufstatus, bufstatus_rst
);
endinterface // if_xcvr_ch_v1_0
`endif
+11
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:busDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_xcvr_cm</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:directConnection>false</spirit:directConnection>
<spirit:isAddressable>false</spirit:isAddressable>
<spirit:maxMasters>1</spirit:maxMasters>
<spirit:maxSlaves>1</spirit:maxSlaves>
</spirit:busDefinition>
+94
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<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>if_xcvr_cm_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="if_xcvr_cm" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>enb</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>addr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>12</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>12</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>wr</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>wdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>rdata</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>16</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>ready</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>
+77
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// (c) Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
// (c) Copyright 2022-2024 Advanced Micro Devices, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of AMD and is protected under U.S. and international copyright
// and other intellectual property laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// AMD, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND AMD HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) AMD shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or AMD had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// AMD products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of AMD products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
// DO NOT MODIFY THIS FILE.
`ifndef if_xcvr_cm_v1_0
`define if_xcvr_cm_v1_0
interface if_xcvr_cm_v1_0();
logic enb; //
logic [11:0] addr; //
logic wr; //
logic [15:0] wdata; //
logic [15:0] rdata; //
logic ready; //
modport MASTER (
input rdata, ready,
output enb, addr, wr, wdata
);
modport SLAVE (
input enb, addr, wr, wdata,
output rdata, ready
);
modport MONITOR (
input enb, addr, wr, wdata, rdata, ready
);
endinterface // if_xcvr_cm_v1_0
`endif
+119
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@@ -0,0 +1,119 @@
###############################################################################
## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
# ip
source ../../scripts/adi_env.tcl
source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
adi_if_define if_xcvr_cm
adi_if_ports output 1 enb
adi_if_ports output 12 addr
adi_if_ports output 1 wr
adi_if_ports output 16 wdata
adi_if_ports input 16 rdata
adi_if_ports input 1 ready
adi_if_define if_xcvr_ch
adi_if_ports input 1 pll_locked
adi_if_ports output 1 rst
adi_if_ports output 1 user_ready
adi_if_ports input 1 rst_done
adi_if_ports output 4 prbssel
adi_if_ports output 1 prbsforceerr
adi_if_ports output 1 prbscntreset
adi_if_ports input 1 prbserr
adi_if_ports input 1 prbslocked
adi_if_ports output 1 lpm_dfe_n
adi_if_ports output 3 rate
adi_if_ports output 2 sys_clk_sel
adi_if_ports output 3 out_clk_sel
adi_if_ports output 4 tx_diffctrl
adi_if_ports output 5 tx_postcursor
adi_if_ports output 5 tx_precursor
adi_if_ports output 1 enb
adi_if_ports output 12 addr
adi_if_ports output 1 wr
adi_if_ports output 16 wdata
adi_if_ports input 16 rdata
adi_if_ports input 1 ready
adi_if_ports output 2 bufstatus
adi_if_ports output 1 bufstatus_rst
adi_if_define if_gt_qpll
adi_if_ports output 1 qpll_rst reset
adi_if_ports output 1 qpll_ref_clk clock
adi_if_define if_gt_pll
adi_if_ports output 1 cpll_rst_m reset
adi_if_ports output 1 cpll_ref_clk_in clock
adi_if_define if_gt_rx
adi_if_ports output 1 rx_p
adi_if_ports output 1 rx_n
adi_if_ports input 1 rx_rst reset
adi_if_ports output 1 rx_rst_m reset
adi_if_ports input 1 rx_pll_rst reset
adi_if_ports input 1 rx_gt_rst reset
adi_if_ports output 1 rx_gt_rst_m reset
adi_if_ports input 1 rx_pll_locked
adi_if_ports output 1 rx_pll_locked_m
adi_if_ports input 1 rx_user_ready
adi_if_ports output 1 rx_user_ready_m
adi_if_ports input 1 rx_rst_done
adi_if_ports output 1 rx_rst_done_m
adi_if_ports input 1 rx_out_clk clock
adi_if_ports output 1 rx_clk clock
adi_if_ports output 1 rx_sysref
adi_if_ports input 1 rx_sync
adi_if_ports input 1 rx_sof
adi_if_ports input 32 rx_data
adi_if_ports input 1 rx_ip_rst reset
adi_if_ports output 4 rx_ip_sof
adi_if_ports output 32 rx_ip_data
adi_if_ports input 1 rx_ip_sysref
adi_if_ports output 1 rx_ip_sync
adi_if_ports input 1 rx_ip_rst_done
adi_if_define if_gt_tx
adi_if_ports input 1 tx_p
adi_if_ports input 1 tx_n
adi_if_ports input 1 tx_rst reset
adi_if_ports output 1 tx_rst_m reset
adi_if_ports input 1 tx_pll_rst reset
adi_if_ports input 1 tx_gt_rst reset
adi_if_ports output 1 tx_gt_rst_m reset
adi_if_ports input 1 tx_pll_locked
adi_if_ports output 1 tx_pll_locked_m
adi_if_ports input 1 tx_user_ready
adi_if_ports output 1 tx_user_ready_m
adi_if_ports input 1 tx_rst_done
adi_if_ports output 1 tx_rst_done_m
adi_if_ports input 1 tx_out_clk clock
adi_if_ports output 1 tx_clk clock
adi_if_ports output 1 tx_sysref
adi_if_ports output 1 tx_sync
adi_if_ports output 32 tx_data
adi_if_ports input 1 tx_ip_rst reset
adi_if_ports input 32 tx_ip_data
adi_if_ports input 1 tx_ip_sysref
adi_if_ports input 1 tx_ip_sync
adi_if_ports input 1 tx_ip_rst_done
adi_if_define if_gt_rx_ksig
adi_if_ports output 4 rx_gt_ilas_f
adi_if_ports output 4 rx_gt_ilas_q
adi_if_ports output 4 rx_gt_ilas_a
adi_if_ports output 4 rx_gt_ilas_r
adi_if_ports output 4 rx_gt_cgs_k
adi_if_define if_do_ctrl
adi_if_ports output 1 request_enable
adi_if_ports output 1 request_valid
adi_if_ports input 1 request_ready
adi_if_ports output -1 request_length
adi_if_ports output -1 response_measured_length
adi_if_ports input 1 response_eot
adi_if_ports input 1 status_underflow
adi_if_ports input 1 status_overflow