initial commit, add dds_par module
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###############################################################################
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## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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# ip
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
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global VIVADO_IP_LIBRARY
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adi_ip_create util_adcfifo
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adi_ip_files util_adcfifo [list \
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"$ad_hdl_dir/library/common/ad_rst.v" \
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"$ad_hdl_dir/library/common/ad_axis_inf_rx.v" \
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"$ad_hdl_dir/library/common/ad_mem_asym.v" \
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"util_adcfifo.v" \
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"util_adcfifo_constr.xdc" ]
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adi_ip_properties_lite util_adcfifo
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adi_ip_add_core_dependencies [list \
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analog.com:$VIVADO_IP_LIBRARY:util_cdc:1.0 \
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]
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ipx::infer_bus_interface adc_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface adc_rst xilinx.com:signal:reset_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface dma_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::save_core [ipx::current_core]
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