upgrade ad9361_mapping to vivado 2024.1
This commit is contained in:
+13
-12
@@ -3,7 +3,7 @@
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"ip_inst": {
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"xci_name": "ad9361_fifo",
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"component_reference": "xilinx.com:ip:fifo_generator:13.2",
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"ip_revision": "9",
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"ip_revision": "10",
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"gen_directory": "../../../../ad9361_mapping.gen/sources_1/ip/ad9361_fifo",
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"parameters": {
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"component_parameters": {
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@@ -16,14 +16,14 @@
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"asymmetric_port_width": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Input_Data_Width": [ { "value": "12", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
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"Input_Depth": [ { "value": "16", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
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"Output_Data_Width": [ { "value": "12", "resolve_type": "user", "enabled": false, "usage": "all" } ],
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"Output_Depth": [ { "value": "16", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Output_Data_Width": [ { "value": "12", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
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"Output_Depth": [ { "value": "16", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Enable_ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Use_Embedded_Registers": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Reset_Pin": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Enable_Reset_Synchronization": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Reset_Type": [ { "value": "Asynchronous_Reset", "resolve_type": "user", "enabled": false, "usage": "all" } ],
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"Full_Flags_Reset_Value": [ { "value": "1", "resolve_type": "user", "usage": "all" } ],
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"Reset_Type": [ { "value": "Asynchronous_Reset", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
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"Full_Flags_Reset_Value": [ { "value": "1", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
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"Use_Dout_Reset": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Dout_Reset_Value": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
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"dynamic_power_saving": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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@@ -42,17 +42,17 @@
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"ecc_pipeline_reg": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Use_Extra_Logic": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
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"Data_Count_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Data_Count_Width": [ { "value": "4", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Write_Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Write_Data_Count_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Write_Data_Count_Width": [ { "value": "4", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Read_Data_Count": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Read_Data_Count_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Read_Data_Count_Width": [ { "value": "4", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Disable_Timing_Violations": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
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"Read_Clock_Frequency": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Write_Clock_Frequency": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Programmable_Full_Type": [ { "value": "No_Programmable_Full_Threshold", "resolve_type": "user", "usage": "all" } ],
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"Full_Threshold_Assert_Value": [ { "value": "13", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Full_Threshold_Negate_Value": [ { "value": "12", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Full_Threshold_Assert_Value": [ { "value": "13", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Full_Threshold_Negate_Value": [ { "value": "12", "value_src": "user", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Programmable_Empty_Type": [ { "value": "No_Programmable_Empty_Threshold", "resolve_type": "user", "usage": "all" } ],
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"Empty_Threshold_Assert_Value": [ { "value": "2", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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"Empty_Threshold_Negate_Value": [ { "value": "3", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
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@@ -385,6 +385,7 @@
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"BASE_BOARD_PART": [ { "value": "" } ],
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"BOARD_CONNECTIONS": [ { "value": "" } ],
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"DEVICE": [ { "value": "xc7z100" } ],
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"NEXTGEN_VERSAL": [ { "value": "0" } ],
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"PACKAGE": [ { "value": "ffg900" } ],
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"PREFHDL": [ { "value": "VERILOG" } ],
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"SILICON_REVISION": [ { "value": "" } ],
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@@ -395,12 +396,12 @@
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},
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"runtime_parameters": {
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"IPCONTEXT": [ { "value": "IP_Flow" } ],
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"IPREVISION": [ { "value": "9" } ],
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"IPREVISION": [ { "value": "10" } ],
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"MANAGED": [ { "value": "TRUE" } ],
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"OUTPUTDIR": [ { "value": "../../../../ad9361_mapping.gen/sources_1/ip/ad9361_fifo" } ],
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"SELECTEDSIMMODEL": [ { "value": "" } ],
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"SHAREDDIR": [ { "value": "." } ],
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"SWVERSION": [ { "value": "2023.2.1" } ],
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"SWVERSION": [ { "value": "2024.1" } ],
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"SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ]
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}
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},
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@@ -1,10 +1,10 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<!-- Product Version: Vivado v2023.2.1 (64-bit) -->
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<!-- Product Version: Vivado v2024.1 (64-bit) -->
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<!-- -->
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<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
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<!-- Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. -->
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<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
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<Project Product="Vivado" Version="7" Minor="65" Path="/home/josh/Workspace/vivado/vivado_pub/modules/xc7z100ffg900-2/ad9361_mapping/ad9361_mapping.xpr">
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<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/Workspace/vivado/vivado_pub/modules/xc7z100ffg900-2/ad9361_mapping/ad9361_mapping.xpr">
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<DefaultLaunch Dir="$PRUNDIR"/>
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<Configuration>
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<Option Name="Id" Val="56c7290e44de4c80a4f826edd9352d43"/>
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@@ -29,12 +29,12 @@
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<Option Name="SimulatorGccInstallDirVCS" Val=""/>
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<Option Name="SimulatorGccInstallDirRiviera" Val=""/>
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<Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
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<Option Name="SimulatorVersionXsim" Val="2023.2"/>
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<Option Name="SimulatorVersionXsim" Val="2024.1"/>
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<Option Name="SimulatorVersionModelSim" Val="2023.2"/>
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<Option Name="SimulatorVersionQuesta" Val="2023.2"/>
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<Option Name="SimulatorVersionXcelium" Val="23.03.002"/>
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<Option Name="SimulatorVersionVCS" Val="U-2023.03-1"/>
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<Option Name="SimulatorVersionRiviera" Val="2022.10"/>
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<Option Name="SimulatorVersionRiviera" Val="2023.04"/>
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<Option Name="SimulatorVersionActiveHdl" Val="14.1"/>
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<Option Name="SimulatorGccVersionXsim" Val="9.3.0"/>
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<Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
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@@ -58,7 +58,6 @@
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<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
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<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
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<Option Name="EnableBDX" Val="FALSE"/>
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<Option Name="FeatureSet" Val="FeatureSet_Classic"/>
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<Option Name="WTXSimLaunchSim" Val="0"/>
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<Option Name="WTModelSimLaunchSim" Val="0"/>
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<Option Name="WTQuestaLaunchSim" Val="0"/>
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@@ -150,6 +149,7 @@
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</Config>
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</FileSet>
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<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
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<Filter Type="Srcs"/>
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopModule" Val="ad9361_rx_map_cmos_dual"/>
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@@ -206,12 +206,10 @@
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<Option Name="Description" Val="Riviera-PRO Simulator"/>
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</Simulator>
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</Simulators>
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<Runs Version="1" Minor="21">
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<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
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<Runs Version="1" Minor="22">
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<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2023">
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<Desc>Vivado Synthesis Defaults</Desc>
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</StratHandle>
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2023"/>
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<Step Id="synth_design"/>
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</Strategy>
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<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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@@ -219,23 +217,19 @@
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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<Run Id="ad9361_fifo_synth_1" Type="Ft3:Synth" SrcSet="ad9361_fifo" Part="xc7z100ffg900-2" ConstrsSet="ad9361_fifo" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/ad9361_fifo_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9361_fifo_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9361_fifo_synth_1">
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<Run Id="ad9361_fifo_synth_1" Type="Ft3:Synth" SrcSet="ad9361_fifo" Part="xc7z100ffg900-2" ConstrsSet="ad9361_fifo" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/ad9361_fifo_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9361_fifo_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9361_fifo_synth_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2023">
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<Desc>Vivado Synthesis Defaults</Desc>
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</StratHandle>
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024"/>
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<Step Id="synth_design"/>
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</Strategy>
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<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2023"/>
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<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
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<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023">
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<Desc>Default settings for Implementation.</Desc>
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</StratHandle>
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<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023"/>
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<Step Id="init_design"/>
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<Step Id="opt_design"/>
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<Step Id="power_opt_design"/>
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@@ -250,11 +244,9 @@
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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<Run Id="ad9361_fifo_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="ad9361_fifo" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="ad9361_fifo_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9361_fifo_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9361_fifo_impl_1">
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<Run Id="ad9361_fifo_impl_1" Type="Ft2:EntireDesign" Part="xc7z100ffg900-2" ConstrsSet="ad9361_fifo" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="ad9361_fifo_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/ad9361_fifo_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/ad9361_fifo_impl_1" ParallelReportGen="true">
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2023">
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<Desc>Default settings for Implementation.</Desc>
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</StratHandle>
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<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
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<Step Id="init_design"/>
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<Step Id="opt_design"/>
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<Step Id="power_opt_design"/>
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@@ -265,11 +257,39 @@
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<Step Id="post_route_phys_opt_design"/>
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<Step Id="write_bitstream"/>
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</Strategy>
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<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2023"/>
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<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
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<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
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<RQSFiles/>
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</Run>
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</Runs>
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<MsgRule>
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<MsgAttr Name="RuleType" Val="0"/>
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<MsgAttr Name="Limit" Val="-1"/>
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<MsgAttr Name="NewSeverity" Val="ANY"/>
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<MsgAttr Name="Id" Val="[BD 41-1306]"/>
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<MsgAttr Name="Severity" Val="ANY"/>
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<MsgAttr Name="ShowRule" Val="1"/>
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<MsgAttr Name="RuleSource" Val="2"/>
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<MsgAttr Name="StringIsRegExp" Val="0"/>
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<MsgAttr Name="RuleId" Val="3"/>
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<MsgAttr Name="Note" Val=""/>
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<MsgAttr Name="Author" Val=""/>
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<MsgAttr Name="CreatedTimestamp" Val=""/>
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</MsgRule>
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<MsgRule>
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<MsgAttr Name="RuleType" Val="0"/>
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<MsgAttr Name="Limit" Val="-1"/>
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<MsgAttr Name="NewSeverity" Val="ANY"/>
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<MsgAttr Name="Id" Val="[BD 41-1271]"/>
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<MsgAttr Name="Severity" Val="ANY"/>
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<MsgAttr Name="ShowRule" Val="1"/>
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<MsgAttr Name="RuleSource" Val="2"/>
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<MsgAttr Name="StringIsRegExp" Val="0"/>
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<MsgAttr Name="RuleId" Val="4"/>
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<MsgAttr Name="Note" Val=""/>
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<MsgAttr Name="Author" Val=""/>
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<MsgAttr Name="CreatedTimestamp" Val=""/>
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</MsgRule>
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<Board/>
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<DashboardSummary Version="1" Minor="0">
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<Dashboards>
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