Add the recv hdl file

2024-07-19 21:31:49 +08:00
parent 9a1f168184
commit e33875ef8f
20 changed files with 7725 additions and 0 deletions
@@ -0,0 +1,196 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+// Company: 
+// Engineer: 
+// 
+// Create Date:    17:44 11/14/2019  
+// Design Name: 
+// Module Name:    TimeSync_top 
+// Project Name: 
+// Target Devices: 
+// Tool versions: 
+// Description: 
+//
+// Dependencies: 
+//
+// Revision: 
+// Revision 0.01 - File Created
+// Additional Comments: 
+//
+//////////////////////////////////////////////////////////////////////////////////
+
+module TimeSync_top(
+	input clk,
+	input rst,
+	
+	input [9:0] dini,
+	input [9:0] dinq,
+	
+	output reg rdy  = 1'd0,
+	output reg [9:0] douti = 10'd0,
+	output reg [9:0] doutq = 10'd0,
+	
+	input			vio_tsync_inter16,//12.5
+	input			framesync,			//帧同步标志
+	output	reg		framesync_tsync  = 1'd0,	//帧同步标志
+	
+	//debug
+	output	reg  [1:0] cnt_tsync = 2'd0,//12.5
+	output	reg  [3:0] flag_clk_4bit = 4'd0//12.5	
+    );
+	
+	
+	wire [9:0] InterpdoutiA;
+	wire [9:0] InterpdoutqA;
+	wire [9:0] InterpdoutiB;
+	wire [9:0] InterpdoutqB;
+	wire [9:0] InterpdoutiC;
+	wire [9:0] InterpdoutqC;
+	wire [9:0] InterpdoutiD;
+	wire [9:0] InterpdoutqD;
+	
+	wire		framesync_Interpolation;
+	Interpolation Interpolation (
+		.clk(clk), 
+		.framesync(framesync),
+		.framesync_Interpolation(framesync_Interpolation),
+		.dini(dini), 
+		.dinq(dinq), 
+		.doutiA(InterpdoutiA), 
+		.doutqA(InterpdoutqA), 
+		.doutiB(InterpdoutiB), 
+		.doutqB(InterpdoutqB), 
+		.doutiC(InterpdoutiC), 
+		.doutqC(InterpdoutqC), 
+		.doutiD(InterpdoutiD), 
+		.doutqD(InterpdoutqD)
+		);
+		
+
+	wire			rdy_4;
+	wire	[9:0]	douti_4;
+	wire	[9:0]	doutq_4;
+	wire	[1:0]	cnt_4;
+	wire	[1:0]	flag_clk4;
+	wire			framesync_out4;
+	TSync_Abs_new4 TSync_Abs_new4 (
+		.clk(clk), 
+		.rst(rst),
+		.framesync_Interpolation(framesync),		
+		.framesync_out4(framesync_out4), 
+		.dataini(dini), 
+		.datainq(dinq), 
+		.TSyncout_nd(rdy_4), 
+		.TSyncout_i(douti_4), 
+		.TSyncout_q(doutq_4), 
+		
+		.cnt(cnt_4), 
+		.flag_clk4(flag_clk4) 
+		);
+		
+	
+	wire			rdy_16;
+	wire	[9:0]	douti_16;
+	wire	[9:0]	doutq_16;
+	wire	[1:0]	cnt_16;
+	wire	[1:0]	flag_clk16;
+	wire	[1:0]	flag_num16;
+	wire			framesync_out16;
+	TSync_Abs_new16 TSync_Abs_new16 (
+		.clk(clk), 
+		.rst(rst), 
+		.framesync_Interpolation(framesync_Interpolation),		
+		.framesync_out16(framesync_out16), 
+		.datain1_i(InterpdoutiA), 
+		.datain1_q(InterpdoutqA), 
+		.datain2_i(InterpdoutiB), 
+		.datain2_q(InterpdoutqB), 
+		.datain3_i(InterpdoutiC), 
+		.datain3_q(InterpdoutqC), 
+		.datain4_i(InterpdoutiD), 
+		.datain4_q(InterpdoutqD), 
+		.TSyncout_nd(rdy_16), 
+		.TSyncout_i(douti_16), 
+		.TSyncout_q(doutq_16), 
+		
+		.cnt(cnt_16), 
+		.flag_clk16(flag_clk16), 
+		.flag_num16(flag_num16) 
+		);
+
+	
+	
+	always @(posedge clk)begin
+		if(rst)begin
+			rdy 	<= 1'd0;
+			douti 	<= 10'd0;
+			doutq 	<= 10'd0;
+			framesync_tsync 	<= 1'd0;
+			
+			cnt_tsync 		<= 2'd0;
+			flag_clk_4bit	<= 4'd0;
+		end
+		else begin
+			if(vio_tsync_inter16) begin
+				rdy 	<= rdy_16;
+				douti 	<= douti_16;
+				doutq 	<= doutq_16;
+				framesync_tsync 	<= framesync_out16;
+				
+				cnt_tsync 		<= cnt_16;
+				flag_clk_4bit 	<= {flag_clk16,flag_num16};
+			end
+			else begin
+				rdy 	<= rdy_4;
+				douti 	<= douti_4;
+				doutq 	<= doutq_4;
+				framesync_tsync 	<= framesync_out4;
+				
+				cnt_tsync 		<= cnt_4;
+				flag_clk_4bit 	<= {2'd0,flag_clk4};
+			end
+		end
+	end
+	
+	
+	
+	// integer	handle01; 	
+	// integer	handle02; 	
+	// integer	handle03; 	
+	// integer	handle04; 
+	// integer	handle05; 	
+	// integer	handle06; 	
+	// integer	handle07; 	
+	// integer	handle08;	
+
+	// reg enable1 = 0;
+	// initial begin
+      // handle01=$fopen("InterpdoutiA.txt","w"); $fclose(handle01);
+      // handle02=$fopen("InterpdoutqA.txt","w"); $fclose(handle02);
+      // handle03=$fopen("InterpdoutiB.txt","w"); $fclose(handle03);
+      // handle04=$fopen("InterpdoutqB.txt","w"); $fclose(handle04);
+	  // handle05=$fopen("InterpdoutiC.txt","w"); $fclose(handle05);
+      // handle06=$fopen("InterpdoutqC.txt","w"); $fclose(handle06);
+      // handle07=$fopen("InterpdoutiD.txt","w"); $fclose(handle07);
+      // handle08=$fopen("InterpdoutqD.txt","w"); $fclose(handle08);
+
+		// #10;
+		// enable1 = 1;
+	// end
+
+	// always@(posedge clk)begin
+		// if(enable1)begin
+			
+				// handle01=$fopen("InterpdoutiA.txt","a+");$fwrite(handle01,"%d\n",$signed(InterpdoutiA));$fclose(handle01);
+				// handle02=$fopen("InterpdoutqA.txt","a+");$fwrite(handle02,"%d\n",$signed(InterpdoutqA));$fclose(handle02);
+				// handle03=$fopen("InterpdoutiB.txt","a+");$fwrite(handle03,"%d\n",$signed(InterpdoutiB));$fclose(handle03);
+				// handle04=$fopen("InterpdoutqB.txt","a+");$fwrite(handle04,"%d\n",$signed(InterpdoutqB));$fclose(handle04);
+				// handle05=$fopen("InterpdoutiC.txt","a+");$fwrite(handle05,"%d\n",$signed(InterpdoutiC));$fclose(handle05);
+				// handle06=$fopen("InterpdoutqC.txt","a+");$fwrite(handle06,"%d\n",$signed(InterpdoutqC));$fclose(handle06);
+				// handle07=$fopen("InterpdoutiD.txt","a+");$fwrite(handle07,"%d\n",$signed(InterpdoutiD));$fclose(handle07);
+				// handle08=$fopen("InterpdoutqD.txt","a+");$fwrite(handle08,"%d\n",$signed(InterpdoutqD));$fclose(handle08);
+			
+		// end
+	// end	
+
+endmodule