josh/vivado-202304
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update gitignore and project recreation script

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josh
2023-03-21 13:15:08 +08:00
parent 70bd6f5681
commit 655bd60c2f
191 changed files with 304 additions and 16483 deletions
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modules/xc7k410tffg900-2/ad9361_mapping/project/ad9361_mapping/ad9361_mapping.tcl → modules/xc7k410tffg900-2/ad9361_mapping/project/ad9361_mapping.tcl
+16 -16
View File
@@ -3,7 +3,7 @@
#
# ad9361_mapping.tcl: Tcl script for re-creating project 'ad9361_mapping'
#
# Generated by Vivado on Sun Mar 19 23:43:33 +0800 2023
# Generated by Vivado on Tue Mar 21 13:01:16 +0800 2023
# IP Build 2633630 on Wed Sep 4 12:30:14 MDT 2019
#
# This file contains the Vivado Tcl commands for re-creating the project to the state*
@@ -108,7 +108,7 @@ if { $::argc > 0 } {
}
# Set the directory path for the original project from where this script was exported
set orig_proj_dir "[file normalize "$origin_dir/"]"
set orig_proj_dir "[file normalize "$origin_dir/ad9361_mapping"]"
# Create project
create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7k410tffg900-2
@@ -161,18 +161,18 @@ if {[string equal [get_filesets -quiet sources_1] ""]} {
# Set 'sources_1' fileset object
set obj [get_filesets sources_1]
set files [list \
[file normalize "${origin_dir}/../../ip/ad9361_fifo/ad9361_fifo.xci"] \
[file normalize "${origin_dir}/../../rtl/ad9361_rx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../../rtl/ad9361_rx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../../rtl/ad9361_rx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../../rtl/ad9361_tx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../../rtl/ad9361_tx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../../rtl/ad9361_tx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../ip/ad9361_fifo/ad9361_fifo.xci"] \
[file normalize "${origin_dir}/../rtl/ad9361_rx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../rtl/ad9361_rx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../rtl/ad9361_rx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../rtl/ad9361_tx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../rtl/ad9361_tx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../rtl/ad9361_tx_map_lvds_dual.v"] \
]
add_files -norecurse -fileset $obj $files
# Set 'sources_1' fileset file properties for remote files
set file "$origin_dir/../../ip/ad9361_fifo/ad9361_fifo.xci"
set file "$origin_dir/../ip/ad9361_fifo/ad9361_fifo.xci"
set file [file normalize $file]
set file_obj [get_files -of_objects [get_filesets sources_1] [list "*$file"]]
set_property -name "generate_files_for_reference" -value "0" -objects $file_obj
@@ -212,12 +212,12 @@ if {[string equal [get_filesets -quiet sim_1] ""]} {
# Set 'sim_1' fileset object
set obj [get_filesets sim_1]
set files [list \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_rx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_tx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_tx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_rx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_tx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../../testbenches/tb_ad9361_rx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_rx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_tx_map_cmos_dual.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_tx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_rx_map_lvds_dual.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_tx_map_cmos_single.v"] \
[file normalize "${origin_dir}/../testbenches/tb_ad9361_rx_map_cmos_single.v"] \
]
add_files -norecurse -fileset $obj $files