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update dj_47dr_ibert vivado project, will not affect vitis project

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update some paths to current ones
This commit is contained in:
josh
2024-07-02 16:10:06 +08:00
parent 86ccfd5cc6
commit 5a9cb91186
4 changed files with 13 additions and 19 deletions
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projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.runs/impl_1/system_top.bit
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projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/sources_1/ip/hop_rom/hop_rom.xci
+1 -1
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@@ -51,7 +51,7 @@
"register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Coe_File": [ { "value": "../../../../../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/sweep_freq.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Coe_File": [ { "value": "../sweep_freq.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Fill_Remaining_Memory_Locations": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.srcs/utils_1/imports/synth_1/system_top.dcp
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projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr
+9 -15
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@@ -4,7 +4,7 @@
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved. -->
<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/dj_47dr_ibert/dj_47dr_ibert.xpr">
<Project Product="Vivado" Version="7" Minor="67" Path="/home/josh/Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_ibert/dj_47dr_ibert.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="fc90dfdc704b4452bb0de3350f605d76"/>
@@ -47,7 +47,7 @@
<Option Name="ActiveSimSet" Val="sim_1"/>
<Option Name="DefaultLib" Val="xil_defaultlib"/>
<Option Name="ProjectType" Val="Default"/>
<Option Name="IPRepoPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/adi_library"/>
<Option Name="IPRepoPath" Val="$PPRDIR/../../../adi_library"/>
<Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
<Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
<Option Name="IPCachePermission" Val="read"/>
@@ -166,12 +166,6 @@
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/sweep_freq.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="system_top"/>
@@ -242,7 +236,7 @@
<FileSet Name="cmpy_18x8" Type="BlockSrcs" RelSrcDir="$PSRCDIR/cmpy_18x8" RelGenDir="$PGENDIR/cmpy_18x8">
<File Path="$PSRCDIR/sources_1/ip/cmpy_18x8/cmpy_18x8.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/cmpy_18x8/cmpy_18x8.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/cmpy_18x8/cmpy_18x8.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -257,7 +251,7 @@
<FileSet Name="dds_32b_8b" Type="BlockSrcs" RelSrcDir="$PSRCDIR/dds_32b_8b" RelGenDir="$PGENDIR/dds_32b_8b">
<File Path="$PSRCDIR/sources_1/ip/dds_32b_8b/dds_32b_8b.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/dds_32b_8b/dds_32b_8b.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/dds_32b_8b/dds_32b_8b.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -272,7 +266,7 @@
<FileSet Name="hop_rom" Type="BlockSrcs" RelSrcDir="$PSRCDIR/hop_rom" RelGenDir="$PGENDIR/hop_rom">
<File Path="$PSRCDIR/sources_1/ip/hop_rom/hop_rom.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hop_rom/hop_rom.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hop_rom/hop_rom.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -287,7 +281,7 @@
<FileSet Name="hrc_64_12_025" Type="BlockSrcs" RelSrcDir="$PSRCDIR/hrc_64_12_025" RelGenDir="$PGENDIR/hrc_64_12_025">
<File Path="$PSRCDIR/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/hrc_64_12_025/hrc_64_12_025.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -302,7 +296,7 @@
<FileSet Name="ila_adc" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ila_adc" RelGenDir="$PGENDIR/ila_adc">
<File Path="$PSRCDIR/sources_1/ip/ila_adc/ila_adc.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_adc/ila_adc.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_adc/ila_adc.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -317,7 +311,7 @@
<FileSet Name="ila_dac" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ila_dac" RelGenDir="$PGENDIR/ila_dac">
<File Path="$PSRCDIR/sources_1/ip/ila_dac/ila_dac.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_dac/ila_dac.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/ila_dac/ila_dac.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
@@ -332,7 +326,7 @@
<FileSet Name="vio_manual_ctrl" Type="BlockSrcs" RelSrcDir="$PSRCDIR/vio_manual_ctrl" RelGenDir="$PGENDIR/vio_manual_ctrl">
<File Path="$PSRCDIR/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../Workspace/vivado/vivado_pub/projects/dj_47dr/dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci"/>
<Attr Name="ImportPath" Val="$PPRDIR/../dj_47dr_demo/dj_47dr_demo.srcs/sources_1/ip/vio_manual_ctrl/vio_manual_ctrl.xci"/>
<Attr Name="ImportTime" Val="1719371236"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>