 josh
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cec690b984
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add dj_47dr vitis projects, refer to readme within each project for details
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2024-06-28 23:06:09 +08:00 |
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josh
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0eead518df
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add dj_47dr pl project, set .dcp as large file type
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2024-06-28 22:24:04 +08:00 |
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josh
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3b6d109c4c
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update gitignore, add .bin file as large lfs
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2024-06-28 22:08:24 +08:00 |
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josh
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dbc7dddc19
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upgrade ad9361_mapping to vivado 2024.1
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2024-06-21 10:10:46 +08:00 |
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josh
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24cc6b9ee9
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update adi_library to vivado 2024.1
compile adi_library with latest hdl commit and vivado 2024.1
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2024-06-06 11:22:50 +08:00 |
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josh
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3c6c573f6a
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add var_cal module for xc7k410tffg900-2
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2024-01-30 10:35:26 +08:00 |
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josh
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a1680685ed
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add tx_qpsk module for xc7k410tffg900-2
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2024-01-30 10:35:16 +08:00 |
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josh
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9eea2b693a
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add multi_ch_cal module for xc7k410tffg900-2
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2024-01-30 10:35:04 +08:00 |
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josh
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5defedcc88
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add ad9361_mapping module for xc7k410tffg900-2
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2024-01-30 10:34:36 +08:00 |
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josh
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118ade226e
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add modules
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2024-01-24 21:56:47 +08:00 |
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josh
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8c68cb519e
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add xilinx spi examlpe with ax7020
refer to projects/ax7020/ax7020_spi_loopback/README.md for detailed information
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2024-01-24 20:14:55 +08:00 |
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josh
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7d18b23b4f
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update gitignore for projects
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2024-01-24 20:12:56 +08:00 |
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josh
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2ac35fe4e6
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add readme
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2024-01-24 11:23:15 +08:00 |
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josh
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315a673005
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initial commit, add dds_par module
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2024-01-15 09:36:08 +08:00 |
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